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arm: Support hardware debugging of ARM architecture #15616
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Signed-off-by: wangmingrong1 <[email protected]>
[Experimental Bot, please feedback here] This PR template itself meets the NuttX requirements by providing sections for all the requested information. However, a user submitting a PR needs to fill out all the sections completely and accurately for the PR to truly meet the requirements. Simply including the template without filling it out is insufficient. Specifically, the template addresses the requirements by prompting for:
The inclusion of the contributing guidelines link further reinforces the importance of adhering to the broader project standards. |
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Please include commit message with more information
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OK, I have improved the description |
Signed-off-by: wangmingrong1 <[email protected]>
@@ -164,6 +164,8 @@ typedef struct arch_addrenv_s arch_addrenv_t; | |||
* Public Function Prototypes | |||
****************************************************************************/ | |||
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uintptr_t up_read_cpuid(void); |
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why not reuse this_cpu() / up_cpu_index()?
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"up_read_cpuid" means I want to get the features supported by the current cpu instead of which cpu it is? Maybe the name is similar to "up_cpu_index", so should I change it to another name?
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I think you don't need to add a new API, because your implementation is not common code, and the relevant interfaces have been implemented. You can refer to the implementation of arm_cpuinfo.c:
cortex-a/r:
cpuid = CP15_GET(MIDR);
cortex-m:
cpuid = getreg32(ARMV6M_SYSCON_CPUID);
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if (dscr & ARM_DSCR_MDBGEN) | ||
{ | ||
goto out; |
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goto out; | |
return 0; |
/* Number of BRP/WRP registers on this CPU. */ | ||
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static int g_breakpoint_num; | ||
static int g_watchpoint_num; |
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remove global variable, read BRP/WRP before you use
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/* Maximum supported watchpoint length. */ | ||
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static uint8_t g_max_watchpoint_len; |
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remove
switch (type) | ||
{ | ||
case DEBUGPOINT_WATCHPOINT_RO: | ||
info.ctrl.type = ARM_BREAKPOINT_LOAD; | ||
break; | ||
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case DEBUGPOINT_WATCHPOINT_WO: | ||
info.ctrl.type = ARM_BREAKPOINT_STORE; | ||
break; | ||
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case DEBUGPOINT_WATCHPOINT_RW: | ||
info.ctrl.type = ARM_BREAKPOINT_LOAD | ARM_BREAKPOINT_STORE; | ||
break; | ||
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case DEBUGPOINT_BREAKPOINT: | ||
case DEBUGPOINT_STEPPOINT: | ||
info.ctrl.type = ARM_BREAKPOINT_EXECUTE; | ||
break; | ||
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default: | ||
return -EINVAL; | ||
} |
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move to common function
return 0; | ||
} | ||
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static int add_debugpoint(struct arch_debug_s *debugponits, |
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Fix all typo.
static int add_debugpoint(struct arch_debug_s *debugponits, | |
static int add_debugpoint(struct arch_debug_s *debugpoints, |
Note: Please adhere to Contributing Guidelines.
Summary
Support hardware debugging of ARM architecture
We can use "up_debugpoint_add" or "up_debugpoint_remove" to add breakpoints, and the hardware will jump into the interrupt after detecting it.
Impact
Currently only available for single core
It will not affect our program.
The debug of arm32 jumps into the exception vector table, and it is also necessary to develop the jump function of the exception vector table in debug mode
Testing
Use arm32 boards, call "up_debugpoint_add", "up_debugpoint_remove" api, and set the breakpoint address.
log:
DFSR: 00000002 indicates that the abnormal debugging mode is entered