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RISC-V-emulator implementation useable for RISCOF riscv-arch-test.

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atoomnetmarc/RISC-V-emulator-Native

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Description

This is an implementation of my RISC-V cpu emulator that can compile into an operating system executable using PlatformIO Native development platform.

It is used for generating signature files that the RISCOF test suite can test against the tests defined in riscv-arch-test.

The resulting report.html that RISCOF generates gives an overview of RISV-V instructions that behave correctly or ones that need some work.

Notes to self

Symlink the build executable called program to /usr/local/bin/rve.

Execute rve in the same directory as where dut-rom.bin (the RISC-V ROM image) and dut-ram.bin (the RISC-V RAM default values) exist. After executing you should get dut-ram-after.bin.

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RISC-V-emulator implementation useable for RISCOF riscv-arch-test.

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