capstone2llvmir: use undef value if register not loaded but used (#1033)

* capstone2llvmir: use undef value if register not loaded but used * capstone2llvmir: fix tests and todo
avast · Dec 6, 2022 · 2cf18ff · 2cf18ff
1 parent c9c67b2
commit 2cf18ff
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Showing 6 changed files with 34 additions and 8 deletions.
diff --git a/src/capstone2llvmir/arm/arm.cpp b/src/capstone2llvmir/arm/arm.cpp
@@ -387,12 +387,16 @@ llvm::Value* Capstone2LlvmIrTranslatorArm_impl::loadOp(
 		case ARM_OP_SYSREG:
 		{
 			auto* val = loadRegister(sysregNumberTranslation(op.reg), irb);
-			return generateOperandShift(irb, op, val);
+			return val
+				? generateOperandShift(irb, op, val)
+				: llvm::UndefValue::get(ty ? ty : getDefaultType());
 		}
 		case ARM_OP_REG:
 		{
 			auto* val = loadRegister(op.reg, irb);
-			return generateOperandShift(irb, op, val);
+			return val
+				? generateOperandShift(irb, op, val)
+				: llvm::UndefValue::get(ty ? ty : getDefaultType());
 		}
 		case ARM_OP_IMM:
 		case ARM_OP_PIMM:

diff --git a/src/capstone2llvmir/arm64/arm64.cpp b/src/capstone2llvmir/arm64/arm64.cpp
@@ -761,6 +761,10 @@ llvm::Value* Capstone2LlvmIrTranslatorArm64_impl::loadOp(
 		case ARM64_OP_REG:
 		{
 			auto* val = loadRegister(op.reg, irb);
+			if (val == nullptr)
+			{
+				return llvm::UndefValue::get(ty ? ty : getDefaultType());
+			}
 			auto* vec = extractVectorValue(irb, op, val);
 			auto* ext = generateOperandExtension(irb, op.ext, vec, ty);
 			return generateOperandShift(irb, op, ext);

diff --git a/src/capstone2llvmir/mips/mips.cpp b/src/capstone2llvmir/mips/mips.cpp
@@ -316,7 +316,8 @@ llvm::Value* Capstone2LlvmIrTranslatorMips_impl::loadOp(
 	{
 		case MIPS_OP_REG:
 		{
-			return loadRegister(op.reg, irb);
+			auto* r = loadRegister(op.reg, irb);
+			return r ? r : llvm::UndefValue::get(ty ? ty : getDefaultType());
 		}
 		case MIPS_OP_IMM:
 		{

diff --git a/src/capstone2llvmir/powerpc/powerpc.cpp b/src/capstone2llvmir/powerpc/powerpc.cpp
@@ -133,9 +133,7 @@ llvm::Value* Capstone2LlvmIrTranslatorPowerpc_impl::loadRegister(
 {
 	if (r == PPC_REG_INVALID)
 	{
-		// TODO
-		// return nullptr;
-		return llvm::UndefValue::get(dstType ? dstType : getDefaultType());
+		return nullptr;
 	}
 
 	llvm::Value* llvmReg = getRegister(r);
@@ -159,7 +157,8 @@ llvm::Value* Capstone2LlvmIrTranslatorPowerpc_impl::loadOp(
 	{
 		case PPC_OP_REG:
 		{
-			return loadRegister(op.reg, irb);
+			auto* r = loadRegister(op.reg, irb);
+			return r ? r : llvm::UndefValue::get(ty ? ty : getDefaultType());
 		}
 		case PPC_OP_IMM:
 		{

diff --git a/src/capstone2llvmir/x86/x86.cpp b/src/capstone2llvmir/x86/x86.cpp
@@ -959,7 +959,8 @@ llvm::Value* Capstone2LlvmIrTranslatorX86_impl::loadOp(
 	{
 		case X86_OP_REG:
 		{
-			return loadRegister(op.reg, irb);
+			auto* r = loadRegister(op.reg, irb);
+			return r ? r : llvm::UndefValue::get(ty ? ty : getDefaultType());
 		}
 		case X86_OP_IMM:
 		{

diff --git a/tests/capstone2llvmir/arm64_tests.cpp b/tests/capstone2llvmir/arm64_tests.cpp
@@ -8246,6 +8246,23 @@ TEST_P(Capstone2LlvmIrTranslatorArm64Tests, ARM64_INS_FSQRT_d_d)
 }
 */
 
+// https://github.com/avast/retdec/issues/998
+TEST_P(Capstone2LlvmIrTranslatorArm64Tests, issue_998)
+{
+	setRegisters({
+		{ARM64_REG_X0, 0x1234},
+	});
+
+	emulate("at s1e1r, x0");
+
+	EXPECT_JUST_REGISTERS_LOADED({ARM64_REG_X0});
+	EXPECT_NO_REGISTERS_STORED();
+	EXPECT_NO_MEMORY_LOADED_STORED();
+	EXPECT_JUST_VALUES_CALLED({
+		{_module.getFunction("__asm_at"), {0x1234}},
+	});
+}
+
 } // namespace tests
 } // namespace capstone2llvmir
 } // namespace retdec