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Added support for atxmega16a4u #115

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83 changes: 83 additions & 0 deletions src/devdescr.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -5320,6 +5320,89 @@ jtag_device_def_type deviceDefinitions[] = {
fill_b2(0x90), // IO space address of MCU control
},
},
// DEV_ATXMEGA16A4U
{
"atxmega16a4u",
0x9441,
256, 80, // 20480 bytes flash
32, 32, // 1024 bytes EEPROM
94 * 4, // 94 interrupt vectors?
DEVFL_MKII_ONLY,
atxmega16a4u_io_registers, // registers
true,
0x37, 0x0000, // fuses
0, // osccal
0, // OCD revision
{
0 // no mkI support
},
{
CMND_SET_DEVICE_DESCRIPTOR,
{ 0xFF,0xFF,0xFF,0xF9,0xFF,0x3D,0xB9,0xF8 }, // ucReadIO
{ 0X00,0X00,0X00,0X00,0X00,0X00,0X00,0X00 }, // ucReadIOShadow
{ 0xFF,0xFF,0x1F,0xE0,0xFF,0x1D,0xA9,0xF8 }, // ucWriteIO
{ 0X00,0X00,0X00,0X00,0X00,0X00,0X00,0X00 }, // ucWriteIOShadow
{ 0x73,0xFF,0x3F,0xFF,0xF7,0x3F,0xF7,0x3F,
0xF7,0x3F,0x5F,0x3F,0x37,0x37,0x36,0x00,
0x00,0x00,0x00,0x00,0xFF,0x0F,0x00,0x00,
0xF7,0x3F,0x36,0x00 }, // ucReadExtIO
{ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00 }, // ucReadIOExtShadow
{ 0x73,0xFF,0x3F,0xF8,0xF7,0x3F,0xF7,0x3F,
0xF7,0x3F,0x5F,0x2F,0x36,0x36,0x36,0x00,
0x00,0x00,0x00,0x00,0xFF,0x0F,0x00,0x00,
0xF7,0x3F,0x36,0x00 }, // ucWriteExtIO
{ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00 }, // ucWriteIOExtShadow
0x31, // ucIDRAddress
0x57, // ucSPMCRAddress
0, // ucRAMPZAddress
fill_b2(256), // uiFlashPageSize
32, // ucEepromPageSize
fill_b4(0x4000), // ulBootAddress -- byte address
fill_b2(0x136), // uiUpperExtIOLoc
fill_b4(256 * 80), // ulFlashSize (page size * pages)
{ 0x00 }, // ucEepromInst
{ 0x00 }, // ucFlashInst
0x3E, // ucSPHaddr
0x3D, // ucSPLaddr
fill_b2(80), // uiFlashpages (64 application + 16 boot)
0x00, // ucDWDRAddress
0x00, // ucDWBasePC
0x00, // ucAllowFullPageBitstream
fill_b2(0x00), // uiStartSmallestBootLoaderSection
1, // EnablePageProgramming
0x02, // ucCacheType
fill_b2(8192), // uiSramStartAddr
0, // ucResetType
0, // ucPCMaskExtended
0, // ucPCMaskHigh
0, // ucEindAddress
fill_b2(0), // EECRAddress
},
{
CMND_SET_XMEGA_PARAMS, // cmd
fill_b2(2), // whatever
47, // length of following data
fill_b4(0x800000), // NVM offset for application flash
fill_b4(0x804000), // NVM offset for boot flash
fill_b4(0x8c0000), // NVM offset for EEPROM
fill_b4(0x8f0020), // NVM offset for fuses
fill_b4(0x8f0027), // NVM offset for lock bits
fill_b4(0x8e0400), // NVM offset for user signature row
fill_b4(0x8e0200), // NVM offset for production sig. row
fill_b4(0x1000000), // NVM offset for data memory
fill_b4(20480), // size of application flash
fill_b2(4096), // size of boot flash
fill_b2(256), // flash page size
fill_b2(1024), // size of EEPROM
32, // EEPROM page size
fill_b2(0x1c0), // IO space base address of NVM controller
fill_b2(0x90), // IO space address of MCU control
},
},
// DEV_ATXMEGA128A3
{
"atxmega128a3",
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