s390x: Emit 20bit immedate variants of indexed loads #12218
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theotherjimmy
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Previously, cranelift did not emit memory operations using 20 bit immedates for reg + reg memory modes. This patch enables that in a type safe manner by exporting a few extractors for 20 bit immediates and changing the argument to the MemArg constructor for reg + reg addressing mode to accept that 20 bit offset instead of the u8 offset.
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cc @uweigand -- would you mind taking a look? |
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Previously, cranelift did not emit memory operations using 20 bit immedates for reg + reg memory modes on s390x. This patch enables that in a type safe manner by exporting a few extractors for 20 bit immediates and changing the argument to the MemArg constructor for reg + reg addressing mode to accept that 20 bit offset instead of the u8 offset.