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SHA512_interface_cfg.yaml
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SHA512_interface_cfg.yaml
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uvmf:
interfaces:
"SHA512_in":
clock: "clk"
reset: "rst"
reset_assertion_level: "False"
parameters:
- name: AHB_DATA_WIDTH
type: int
value: '32'
- name: AHB_ADDR_WIDTH
type: int
value: '32'
- name: BYPASS_HSEL
type: bit
value: '0'
hdl_typedefs:
- name: sha512_in_op_transactions
type: enum bit[2:0] {reset_op = 3'b000, sha224_op = 3'b100, sha256_op = 3'b101, sha384_op = 3'b110, sha512_op = 3'b111}
ports:
- name: sha512_rst
dir: output
width: '1'
- name: hadrr
dir: output
width: AHB_ADDR_WIDTH
- name: hwdata
dir: output
width: AHB_DATA_WIDTH
- name: hsel
dir: output
width: '1'
- name: hwrite
dir: output
width: '1'
- name: hmastlock
dir: output
width: '1'
- name: hready
dir: output
width: '1'
- name: htrans
dir: output
width: '2'
- name: hprot
dir: output
width: '4'
- name: hburst
dir: output
width: '3'
- name: hsize
dir: output
width: '3'
- name: transaction_flag_in_monitor
dir: output
width: '1'
- name: op
dir: output
width: '3'
- name: test_case_sel
dir: output
width: '8'
transaction_vars:
- name: op
type: sha512_in_op_transactions
iscompare: 'True'
isrand: 'True'
- name: test_case_sel
type: bit [7:0]
iscompare: 'True'
isrand: 'True'
transaction_constraints:
- name: sha512_valid_op_constraints
value: '{ op inside {sha224_op, sha256_op, sha384_op, sha512_op}; }'
"SHA512_out":
clock: "clk"
reset: "rst"
reset_assertion_level: "False"
parameters:
- name: AHB_DATA_WIDTH
type: int
value: '32'
- name: AHB_ADDR_WIDTH
type: int
value: '32'
- name: OUTPUT_TEXT_WIDTH
type: int
value: '512'
- name: BYPASS_HSEL
type: bit
value: '0'
ports:
- name: hresp
dir: input
width: '1'
- name: hreadyout
dir: input
width: '1'
- name: hrdata
dir: input
width: AHB_DATA_WIDTH
- name: read_flag_monitor
dir: input
width: '1'
transaction_vars:
- name: result
type: bit [OUTPUT_TEXT_WIDTH-1:0]
isrand: "False"
iscompare: "True"