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CHIPS Alliance

Common Hardware for Interfaces, Processors and Systems
README.md

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🔗 chipsalliance.org | 📫 [email protected]

The CHIPS Alliance develops high-quality, open source hardware designs and tools relevant to ASICs and FPGAs. By creating an open and collaborative environment, CHIPS Alliance shares resources to lower the cost of development. Companies and individuals can work together to develop open source CPUs, various peripherals, and complex IP blocks, as well as open source hardware or software tools to accelerate the creation of more efficient and innovative chip designs.

The CHIPS Alliance hosts multiple open source Projects, which are Workgroups.

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  1. chisel chisel Public

    Chisel: A Modern Hardware Design Language

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  3. verible verible Public

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  5. Cores-VeeR-EH1 Cores-VeeR-EH1 Public

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    Flexible Intermediate Representation for RTL

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Repositories

Showing 10 of 109 repositories
  • t1 Public
    chipsalliance/t1’s past year of commit activity
    Scala 118 Apache-2.0 23 16 24 Updated Nov 7, 2024
  • chisel Public

    Chisel: A Modern Hardware Design Language

    chipsalliance/chisel’s past year of commit activity
    Scala 3,977 Apache-2.0 597 313 (1 issue needs help) 170 Updated Nov 7, 2024
  • caliptra-rtl Public

    HW Design Collateral for Caliptra RoT IP

    chipsalliance/caliptra-rtl’s past year of commit activity
    SystemVerilog 75 Apache-2.0 37 68 11 Updated Nov 7, 2024
  • Surelog Public

    SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

    chipsalliance/Surelog’s past year of commit activity
    C++ 362 Apache-2.0 69 51 (2 issues need help) 0 Updated Nov 7, 2024
  • Cores-VeeR-EL2 Public

    VeeR EL2 Core

    chipsalliance/Cores-VeeR-EL2’s past year of commit activity
    SystemVerilog 252 Apache-2.0 75 25 10 Updated Nov 7, 2024
  • Caliptra Public

    Caliptra IP and firmware for integrated Root of Trust block

    chipsalliance/Caliptra’s past year of commit activity
    234 Apache-2.0 33 17 2 Updated Nov 7, 2024
  • caliptra-sw Public

    Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test

    chipsalliance/caliptra-sw’s past year of commit activity
    Rust 94 Apache-2.0 44 100 58 Updated Nov 7, 2024
  • i3c-core Public
    chipsalliance/i3c-core’s past year of commit activity
    SystemVerilog 6 Apache-2.0 3 1 1 Updated Nov 7, 2024
  • synlig-logs Public
    chipsalliance/synlig-logs’s past year of commit activity
    SystemVerilog 0 0 0 0 Updated Nov 7, 2024
  • synlig Public

    SystemVerilog synthesis tool

    chipsalliance/synlig’s past year of commit activity
    Verilog 168 Apache-2.0 21 65 8 Updated Nov 6, 2024
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