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In the example below, foo is assigned before it is declared and is therefore infered as the 'default net type' according to 6.10, even if the eventual type is not the default net type. SV2V picks this up and causes the generated result to be incorrect; generates a wire. Yosys subsequently raises a warning as the wire is assigned from the sequential block. Verible (linter) should flag instances such as this where the variable use preceeds the declaration.
always_comb foo ='b1;
logic foo;
The text was updated successfully, but these errors were encountered:
In the example below,
foo
is assigned before it is declared and is therefore infered as the 'default net type' according to 6.10, even if the eventual type is not the default net type. SV2V picks this up and causes the generated result to be incorrect; generates a wire. Yosys subsequently raises a warning as the wire is assigned from the sequential block. Verible (linter) should flag instances such as this where the variable use preceeds the declaration.The text was updated successfully, but these errors were encountered: