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add tests for SMV LTLSPEC
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kroening committed Sep 25, 2024
1 parent 4c18952 commit 5e0476b
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13 changes: 13 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_F3.desc
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CORE broken-smt-backend
smv_ltlspec_F3.smv
--bound 10
^\[.*\] F x = 0: REFUTED$
^Counterexample with 4 states:$
^x@0 = 1$
^x@1 = 2$
^x@2 = 3$
^x@3 = 3$
^EXIT=10$
^SIGNAL=0$
--
^warning: ignoring
15 changes: 15 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_F3.smv
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MODULE main

VAR x : 0..3;

ASSIGN
init(x) := 1;

next(x) :=
case
x=3 : 3;
TRUE: x+1;
esac;

-- trace should be 1, 2, 3, 3, ...
LTLSPEC F x = 0
12 changes: 12 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_G3.desc
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CORE broken-smt-backend
smv_ltlspec_G3.smv
--bound 10
^\[.*\] G X x != 3: REFUTED$
^Counterexample with 3 states:$
^x@0 = 1$
^x@1 = 2$
^x@2 = 3$
^EXIT=10$
^SIGNAL=0$
--
^warning: ignoring
15 changes: 15 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_G3.smv
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@@ -0,0 +1,15 @@
MODULE main

VAR x : 0..3;

ASSIGN
init(x) := 1;

next(x) :=
case
x=3 : 3;
TRUE: x+1;
esac;

-- trace should be 1, 2, 3
LTLSPEC G X x!=3
14 changes: 14 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_R2.desc
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@@ -0,0 +1,14 @@
KNOWNBUG broken-smt-backend
smv_ltlspec_R2.smv
--bound 10
^\[.*\] FALSE R x != 3: REFUTED$
^Counterexample with 4 states:$
^x@0 = 1$
^x@1 = 2$
^x@2 = 3$
^EXIT=10$
^SIGNAL=0$
--
^warning: ignoring
--
The trace has too many states.
15 changes: 15 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_R2.smv
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@@ -0,0 +1,15 @@
MODULE main

VAR x : 0..3;

ASSIGN
init(x) := 1;

next(x) :=
case
x=3 : 3;
TRUE: x+1;
esac;

-- trace should be 1, 2, 3
LTLSPEC FALSE R x != 3
10 changes: 10 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_R3.desc
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@@ -0,0 +1,10 @@
KNOWNBUG broken-smt-backend
smv_ltlspec_R3.smv
--bound 1
^\[.*\] FALSE R x != 3: PROVED up to bound 1$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
The counterexample is wrong.
16 changes: 16 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_R3.smv
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@@ -0,0 +1,16 @@
MODULE main

VAR x : 0..3;

ASSIGN
init(x) := 1;

next(x) :=
case
x=3 : 3;
TRUE: x+1;
esac;

-- trace should be 1, 2, 3
-- hence no trace with k=1
LTLSPEC FALSE R x != 3
9 changes: 9 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_R4.desc
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@@ -0,0 +1,9 @@
CORE broken-smt-backend
smv_ltlspec_R4.smv
--bound 10
^\[.*\] FALSE R x != 0: PROVED up to bound 10$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
15 changes: 15 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_R4.smv
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@@ -0,0 +1,15 @@
MODULE main

VAR x : 0..3;

ASSIGN
init(x) := 1;

next(x) :=
case
x=3 : 3;
TRUE: x+1;
esac;

-- should pass
LTLSPEC FALSE R x != 0
13 changes: 13 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_U2.desc
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KNOWNBUG broken-smt-backend
smv_ltlspec_U2.smv
--bound 10
^\[.*\] TRUE U x = 0: REFUTED$
^Counterexample with 4 states:$
^x@0 = 1$
^x@1 = 2$
^x@2 = 3$
^x@3 = 3$
^EXIT=10$
^SIGNAL=0$
--
^warning: ignoring
15 changes: 15 additions & 0 deletions regression/ebmc/smv/smv_ltlspec_U2.smv
Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
MODULE main

VAR x : 0..3;

ASSIGN
init(x) := 1;

next(x) :=
case
x=3 : 3;
TRUE: x+1;
esac;

-- trace should be 1, 2, 3, 3, ...
LTLSPEC TRUE U x = 0

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