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Releases: enjoy-digital/litex

2025.04

26 May 08:46
@enjoy-digital enjoy-digital
2025.04
2bbe250
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[> 2025.04, released on May 26th 2025

[> Fixed

  • build/io : Fixed length check after wrapping for SDRIO/Tristate to handle int and bool types correctly (PR #2105).
  • soc/integration/soc/add_slave : Fixed crash when strip_origin is None by correctly using self.regions[name] (86b052e41).
  • build/anlogic : Fixed Tang Dynasty programmer exit-hang and corrected “TangDinasty” typo → TangDynasty (79d206fc2, 6f8e65e10).
  • build/io / gen/fhdl/expression : Fixed slice-resolution regression introduced by PR #2161 (666c9b430).
  • soc/software/bios/litedram : Fixed write-levelling helpers being called on DDR2 parts (e88fbfb95).
  • gcc flags : Fixed wrong -march value for Minerva and Sentinel CPUs (866d04025).
  • litedram/phy/s7ddrphy : Fixed unintended write-leveling on DDR2 modules (632e921).
  • liteeth/phy/rmii : Fixed speed-detect FSM corner cases and RX-path glitches (6e7a70c).
  • litepcie/software/kernel : Fixed liteuart build on Linux ≥ 6.10/6.11 (3b5c70f, be0abeb).
  • tools/json2dts_zephyr : Fixed missing interrupt 0, MDIO handling, and buffer split issues (2a97b0308).
  • misc : Fixed uptime counter width (now uint64) and removed assorted static-analysis warnings (724034564).

[> Added

  • cores/cpu/ibex : Aligned with latest RTL, fixed file paths, and addressed Verilator parameter type limitation (PR #2160).
  • cores/cpu/openc906 : Aligned with latest RTL, removed unused file lists, and updated bus conversion logic (PR #2159).
  • build/io : Added multibit/bus variants of SDR and DDR IO for Efinix and other platforms (PR #2105).
  • gen/fhdl/expression : Resolved slice handling completely to reduce complexity in Verilog files (PR #2161).
  • cores/cpu/coreblocks : Added new open-source RISC-V “Coreblocks” CPU support (fb6d78c92).
  • build/vhd2v_converter : Added CTOR argument to bypass source-flattening when desired (138379f3d).
  • fhdl/verilog/slice_lowerer : Added inversion support and lowering of specials (7efbd0535, 32041f21c).
  • build/anlogic : Added TangDynastyProgrammer backend and DR1V90 MEG484 device support (c77f2e834, 2387bc6be).
  • build/colognechip : Added native CC_IOBUF tristate and open-source Peppercorn flow (62c9b9eb3, 1e259f5ef).
  • soc/cores/clock/xilinx_common : Added Dynamic-Phase-Shift (DPS) interface exposure (2c98fed25).
  • soc/cores/clock/efinix : Added on-chip flash programmer and Topaz FPGA family support (761184110, a0159e18a).
  • axi/Wishbone2AXILite : Added one-cycle faster implementation (d631d810b).
  • litepcie PHYs : Added Certus Pro-NX PCIe PHY (e157d1e) and Gowin Arora V PCIe PHY (e14cf57).
  • litepcie/frontend/wishbone : Added 64-bit addressing and byte-addressable mode (5f15aa7).
  • litescope : Added automatic group data-width padding and --port CLI flag (021a834).
  • litedram : Added DDR2 device K4T1G164QGBCE7 definition (118e291).
  • liteeth/phy/rmii : Added automatic 10/100 Mb/s speed-detect FSM (bbc4eb7).
  • litespi : Added unified bus abstraction (PR #81) and offset-less mmap mode (PR #82).
  • Boards/targets : Added support for mlkpai FS01 DR1V90M, HyVision PCIe opt01 revF, Alinx AX7020/7010 (PS7 DDR), Kintex-7 Base C, Colorlight 5A-75E v8.2, Certus-Pro-NX Versa, Sipeed Tang Console / Mega 138k Pro / Nano 20k, Efinix Ti375 C529 (2× SFP, DDR, FMC-LPC) and several others (see commit history).

[> Changed

  • gen/fhdl/instance : Switched to using expression.py for expression generation (e71e404ef).
  • gen/fhdl : Moved expression generation functions to expression.py for better organization (0bfaf39d5).
  • build/yosys_nextpnr/xilinx : Injects --freq automatically from reported Fmax (fce56fae8).
  • tools/json2dts_zephyr : Rewritten for modularity; adds optional overlay and buffer splitting (778d39d5c…).
  • build/common/TristateImpl : Added wide-oe support and stricter signal-length checks (913a70962, a019fd4ed).
  • Clocking cores : Exposed DPS on Xilinx, enabled PLLA on GW5AT, improved async DDR I/O.
  • CI/tooling : Migrated CI to Ubuntu 22.04, switched to OSS-CAD-Suite, added Python 3.11 compatibility.
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2024.12

07 Jan 08:46
@enjoy-digital enjoy-digital
2024.12
a1ea5a2
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2024.12

[> 2024.12, released on January 7th 2025

[> Fixed

  • tools/litex_client : Fixed error handling and timeout management (1225bf45, fc529dca, b9cc5c58).
  • soc/cores/led : Fixed WS2812 LED count calculation (PR #2142).
  • build/vhd2v_converter : Fixed instance handling and robustness (PR #2145, 8254a349f).
  • soc/cores/jtag : Fixed ECP5JTAG initialization for Diamond/Trellis toolchains (4368d5a9e).
  • litespi : Fixed SPI Flash erase functionality and debug output (e61196b1c, 63fa4fda8).
  • liteeth/phy/pcs_1000basex : Fixed deadlock in AUTONEG_WAIT_ABI state and improved RX alignment (e5746c8).
  • liteeth/phy/pcs_1000basex : Fixed RX Config consistency check and cleanup pass (20e9ea6, cd2274d).
  • litepcie/software/kernel : Fixed compilation warnings and removed unused functions (867c818).
  • platforms/limesdr_mini_v2 : Fixed SPI Flash pinout (MOSI <-> MISO) (3b8c558).
  • efinix_trion_t20_bga256_dev_kit : Fixed ClockSignal handling (77cb9a5).

[> Added

  • cpu/zynqmp : Added SGMII support via PL and optional PTP (PR #2095).
  • liteeth/phy : Improved 1000BaseX/2500BaseX PCS/PHYs (PR #174).
  • cpu/urv : Added uRV CPU support (RISC-V CPU use in White Rabbit project) (PR #2098).
  • tools/litex_client : Added memory regions table, auto-refresh, and binary file read/write support (d3258a398, 3875a4c1f, 95f37a82e).
  • tools/litex_client : Added endianness configuration for memory accesses (71e802aec).
  • cores/clock/intel : Added reset support to Intel PLLs (PR #2139).
  • cores/cpu/vexiiriscv : Added PMP support and MACSG (DMA-based Ethernet) support (PR #2130).
  • build/altera/quartus : Added .svf generation for OpenFPGALoader compatibility (e91d4d1a3).
  • build/efinix : Added SEU (Single Event Upset) interface (PR #2128).
  • soc/cores/bitbang/i2c : Added connect_pads parameter for flexible I2C pad handling (fdd7c97ce).
  • platforms/xilinx_zcu102 : Added all SFP connectors (0eabebf).
  • targets/sipeed_tang_nano_20k : Added SPI Flash and HDMI support (2d25408).
  • targets/embedfire_rise_pro : Added support for EmbedFire Rise Pro (d7f2b5a).
  • targets/alibaba_vu13p : Added support for Alibaba VU13P (e8e833d).
  • targets/efinix_ti375_c529_dev_kit : Added VexII Ethernet support (4c61bac).
  • targets/efinix_trion_t20_mipi_dev_kit : Added simple flash fix (1727d30).
  • targets/machdyne_mozart_mx2 : Added support for Mozart MX2 (399f10f).
  • targets/tec0117 : Updated to work with Apicula (9d68972).

[> Changed

  • tools/litex_client : Improved GUI presentation and memory region display (5c156b499, d3258a398).
  • liteeth/phy/pcs_1000basex : Refactored RX Config consistency check and improved timers (b783639, fe69248).
  • liteeth/phy/a7_1000basex : Updated ALIGN_COMMA_WORD/RXCDR_CFG settings from Xilinx wizard (04fc888).
  • liteeth/mac/core : Switched to LiteXModule for better modularity (f30d6ef).
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