Add esp32p4 support.

[mdwn]

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Submission Checklist 📝

• I have updated existing examples or added new ones (if applicable).
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Pull Request Details 📖

Description

I've added esp32p4 support to the template. Note that this depends on unreleased espflash, esp-idf-sys, esp-idf-svc, and esp-idf-hal bits to actually work, however, so I can totally understand punting until those are officially released.

Testing

➜  src cargo generate /home/mike/src/esp-idf-template cargo
⚠️   Favorite `/home/mike/src/esp-idf-template` not found in config, using it as a local path: /home/mike/src/esp-idf-template
🤷   Project Name: test-template
🔧   Destination: /home/mike/src/test-template ...
🔧   project-name: test-template ...
🔧   Generating template ...
✔ 🤷   Which MCU to target? · esp32p4
✔ 🤷   Configure advanced template options? · false
[ 1/13]   Done: .cargo/config.toml                                                                                                                                                                       [ 2/13]   Done: .cargo                                                                                                                                                                                   [ 3/13]   Done: .github/workflows/rust_ci.yml                                                                                                                                                            [ 4/13]   Done: .github/workflows                                                                                                                                                                        [ 5/13]   Done: .github                                                                                                                                                                                  [ 6/13]   Done: .gitignore                                                                                                                                                                               [ 7/13]   Done: Cargo.toml                                                                                                                                                                               [ 8/13]   Done: build.rs                                                                                                                                                                                 [ 9/13]   Ignored: pre-script.rhai                                                                                                                                                                       [10/13]   Done: rust-toolchain.toml                                                                                                                                                                      [11/13]   Done: sdkconfig.defaults                                                                                                                                                                       [12/13]   Done: src/main.rs                                                                                                                                                                              [13/13]   Done: src                                                                                                                                                                                      🔧   Moving generated files into: `/home/mike/src/test-template`...
🔧   Initializing a fresh Git repository
✨   Done! New project created /home/mike/src/test-template

After munging Cargo.toml to point to the in-flight esp-idf-sys, esp-idf-svc, and esp-idf-hal bits and doing a cargo build --release:

➜  test-template git:(master) ✗ ../espflash/target/release/espflash flash --no-stub --monitor target/riscv32imafc-esp-espidf/release/test-template
[2026-01-04T23:53:47Z INFO ] Serial port: '/dev/ttyACM0'
[2026-01-04T23:53:47Z INFO ] Connecting...
Chip type:         esp32p4 (revision v1.3)
Crystal frequency: 40 MHz
Flash size:        32MB
Features:          High-Performance MCU
MAC address:       30:ed:a0:e3:27:f0
App/part. size:    416,816/16,384,000 bytes, 2.54%
[00:00:00] [========================================]      14/14      0x2000   Skipped! (checksum matches)                                                                                               [00:00:00] [========================================]       1/1       0x8000   Skipped! (checksum matches)                                                                                               [00:00:25] [========================================]     225/225     0x10000  Verifying... OK!                                                                                                          [2026-01-04T23:54:13Z INFO ] Flashing has completed!
Commands:
    CTRL+R    Reset chip
    CTRL+C    Exit

ESP-ROM:esp32p4-eco2-20240710
Build:Jul 10 2024
rst:0x1 (POWERON),boot:0x10f (SPI_FAST_FLASH_BOOT)
SPI mode:DIO, clock div:2
load:0x4ff33ce0,len:0x164c
load:0x4ff29ed0,len:0xe08
load:0x4ff2cbd0,len:0x33c4
entry 0x4ff29eda
I (27) boot: ESP-IDF v5.5.1-838-gd66ebb86d2e 2nd stage bootloader
I (28) boot: compile time Nov 26 2025 12:27:01
I (28) boot: Multicore bootloader
I (30) boot: chip revision: v1.3
I (32) boot: efuse block revision: v0.3
I (37) boot.esp32p4: SPI Speed      : 40MHz
I (39) boot.esp32p4: SPI Mode       : DIO
I (43) boot.esp32p4: SPI Flash Size : 32MB
I (47) boot: Enabling RNG early entropy source...
I (52) boot: Partition Table:
I (54) boot: ## Label            Usage          Type ST Offset   Length
I (60) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (67) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (73) boot:  2 factory          factory app      00 00 00010000 00fa0000
I (81) boot: End of partition table
I (83) esp_image: segment 0: paddr=00010020 vaddr=40050020 size=12924h ( 76068) map
I (108) esp_image: segment 1: paddr=0002294c vaddr=30100000 size=00044h (    68) load
I (110) esp_image: segment 2: paddr=00022998 vaddr=4ff00000 size=0c2fch ( 49916) load
I (125) esp_image: segment 3: paddr=0002ec9c vaddr=4ff0c300 size=0137ch (  4988) load
I (128) esp_image: segment 4: paddr=00030020 vaddr=40000020 size=44cd4h (281812) map
I (189) esp_image: segment 5: paddr=00074cfc vaddr=4ff0d67c size=00f04h (  3844) load
I (195) boot: Loaded app from partition at offset 0x10000
I (195) boot: Disabling RNG early entropy source...
I (207) cpu_start: Multicore app
W (217) clk: esp_perip_clk_init() has not been implemented yet
I (224) cpu_start: Pro cpu start user code
I (224) cpu_start: cpu freq: 360000000 Hz
I (224) app_init: Application information:
I (227) app_init: Project name:     libespidf
I (232) app_init: App version:      1
I (236) app_init: Compile time:     Jan  4 2026 18:53:07
I (242) app_init: ELF file SHA256:  67b3bc2dc...
I (247) app_init: ESP-IDF:          v5.3.3
I (252) efuse_init: Min chip rev:     v0.1
I (257) efuse_init: Max chip rev:     v1.99
I (262) efuse_init: Chip rev:         v1.3
I (267) heap_init: Initializing. RAM available for dynamic allocation:
I (274) heap_init: At 4FF0FD20 len 0002B2A0 (172 KiB): RAM
I (280) heap_init: At 4FF3AFC0 len 00004BF0 (18 KiB): RAM
I (286) heap_init: At 4FF40000 len 00060000 (384 KiB): RAM
I (292) heap_init: At 50108080 len 00007F80 (31 KiB): RTCRAM
I (298) heap_init: At 30100044 len 00001FBC (7 KiB): TCM
I (306) spi_flash: detected chip: generic
W (309) spi_flash: Detected flash size > 16 MB, but access beyond 16 MB is not supported for this flash model yet.
I (320) spi_flash: flash io: dio
I (325) main_task: Started on CPU0
I (355) main_task: Calling app_main()
I (355) test_template: Hello, world!
I (355) main_task: Returned from app_main()

[mdwn]

Looks like the CI for esp32p4 won't work until we update these dependencies.

[SakiiCode]

Can you add your Cargo.toml patches if esp32p4 is the target? Just asking because esp-idf-* packages haven't had new versions for a long time

[mdwn]

I'm unsure, to be honest -- I'm just a contributor here. From a maintenance perspective, targeting a patch seems questionable, but I get it. I'd be inclined to lean on @ivmarkov for the answer here.

[ivmarkov]

I think this PR has to wait until the esp-idf-* crates are finally released.

The one stumbling block for releasing those is that some good soul needs to validate, that the pin configuration in the gpio module for the following chips:

• esp32c5
• esp32c61

... is correct. Or if not - fix it.

Once this is done, I think we should release.