Split ScalarQuantizer code into independent parts (#4296) #4557
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) Summary: Pull Request resolved: facebookresearch#4557 Pull Request resolved: facebookresearch#4296 Splits the ScalarQuantizer code into parts so that the AVX2 and AVX512 can be compiled independently. Differential Revision: D73037185
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) Summary: Pull Request resolved: facebookresearch#4557 Pull Request resolved: facebookresearch#4296 Splits the ScalarQuantizer code into parts so that the AVX2 and AVX512 can be compiled independently. Differential Revision: D73037185
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) Summary: Pull Request resolved: facebookresearch#4557 Pull Request resolved: facebookresearch#4296 Splits the ScalarQuantizer code into parts so that the AVX2 and AVX512 can be compiled independently. Differential Revision: D73037185
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) Summary: Pull Request resolved: facebookresearch#4557 Pull Request resolved: facebookresearch#4296 Splits the ScalarQuantizer code into parts so that the AVX2 and AVX512 can be compiled independently. Reviewed By: mnorris11 Differential Revision: D73037185
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…DQ, Vl, DL) detection
Summary:
* Added support to detect SIMD instruction set for both `AVX2` and `AVX512F, AVX512VL` related levels
* Added hardware specific unit tests (eg: checks when unit tests are ran on x86 arch then relevant SIMD levels are returned, also respective instructions are executed)
* Reason for explicitly running computation and not relying on `__builtin_cpu_supports("avx512f")` [link](https://stackoverflow.com/questions/48677575/does-gccs-builtin-cpu-supports-check-for-os-support)
* Also, fixes the bug in existing `AVX2` detection
* Incorrect CPUID Bit Check: Function uses `ebx & (1 << 16)` to check for `AVX2` support. This is incorrect because bit 16 in `ebx` is actually used for `AVX-512F`, not `AVX2`.
* Correct Bit for AVX2: Correct bit for detecting AVX2 is bit 5 in `ebx` when `eax = 7` and `ecx = 0`. This is based on Intel's documentation for the CPUID instruction.
* Another bug observed in constructor for SIMDConfig (if env variable is set, the codepath still follows detection via code)
* Improving SIMDConfig to take parameters to its constructor to support and enable injection mechanism for better testing* Adding more unit tests for other Hardware
* Added variable with SIMDConfig to track all possible supported SIMD Levels
Differential Revision: D72937710
Reviewed By: mdouze
Summary: `fvec_madd` is the first function to test dispatching to AVX and AVX512 distances_simd.cpp is split into specialized files distances_avx2.cpp distances_avx512.cpp that are compiled with appropriate flags. Differential Revision: D72937708 Reviewed By: mnorris11
Summary: Pull Request resolved: facebookresearch#4291 moved IndexIVFPQ and IndexPQ to dynamic dispatch. Since the code was already quite modular (thanks Alex!), this boils down to make independent cpp files for the different SIMD versions. Differential Revision: D72937709
…training code, split quantizer code into headers, Make headers more independent Summary: Move the interface of SIMD functions to use the simdXfloat32 API to mutualize code. Begin splitting the ScalarQuantizer.cpp Continue splitting. Purely in header files for now. Differential Revision: D72945865
) Summary: Pull Request resolved: facebookresearch#4557 Pull Request resolved: facebookresearch#4296 Splits the ScalarQuantizer code into parts so that the AVX2 and AVX512 can be compiled independently. Reviewed By: mnorris11 Differential Revision: D73037185
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Summary:
Splits the ScalarQuantizer code into parts so that the AVX2 and AVX512 can be compiled independently.
Differential Revision: D73037185