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32x: quirk on rom read 0x1070 when RV=1
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Federico Berti committed Jan 18, 2024
1 parent c49f691 commit 92cdfbf
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Showing 2 changed files with 59 additions and 1 deletion.
13 changes: 13 additions & 0 deletions src/main/java/s32x/bus/S32xBus.java
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@
import java.nio.ByteBuffer;

import static m68k.cpu.Cpu.PC_MASK;
import static omegadrive.util.BufferUtil.assertionsEnabled;
import static omegadrive.util.LogHelper.logWarnOnce;
import static omegadrive.util.Util.th;

Expand Down Expand Up @@ -135,6 +136,9 @@ private int readAdapterEnOn(int address, Size size) {
logWarnOnce(LOG, "Ignoring read access to ROM when RV={}, addr: {} {}", DmaFifo68k.rv, th(address), size);
return size.getMask();
}
if (assertionsEnabled && romReadQuirk(address)) {
return size.getMask();
}
res = super.read(address, size);
}
if (verboseMd) {
Expand All @@ -158,6 +162,15 @@ private int readAdapterEnOff(int address, Size size) {
return res;
}

//quirk: https://github.com/viciious/32XDK/wiki/Bugs-and-quirks#about-rom-read-when-rv1
private boolean romReadQuirk(int address) {
if ((address & 0xFFFF_CFFC) == 0x70 && address > 0x100) {
LogHelper.logWarnOnce(LOG, "Unable to read from ROM address: {} when RV=1", th(address));
return true;
}
return false;
}

private void writeAdapterEnOn(int address, int data, Size size) {
if (address >= S32xDict.M68K_START_FRAME_BUFFER && address < S32xDict.M68K_END_FRAME_BUFFER) {
write32xWord((address & S32xDict.DRAM_MASK) | S32xDict.START_DRAM, data, size);
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47 changes: 46 additions & 1 deletion src/test/java/s32x/RomAccessTest.java
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@

import static omegadrive.bus.model.GenesisBusProvider.SRAM_LOCK;
import static omegadrive.util.BufferUtil.CpuDeviceAccess.*;
import static omegadrive.util.BufferUtil.assertionsEnabled;
import static omegadrive.util.Util.th;
import static s32x.MarsRegTestUtil.readBus;
import static s32x.MarsRegTestUtil.setRv;
Expand All @@ -28,10 +29,11 @@
public class RomAccessTest {

private MarsLauncherHelper.Sh2LaunchContext lc;
private static int ROM_SIZE = 0x3100;

@BeforeEach
public void before() {
byte[] rom = new byte[0x1000];
byte[] rom = new byte[ROM_SIZE];
MarsRegTestUtil.fillAsMdRom(rom, true);
lc = MarsRegTestUtil.createTestInstance(rom);
lc.s32XMMREG.aden = 1;
Expand Down Expand Up @@ -133,6 +135,49 @@ public void testBadAppleSonicAccess() {
}


@Test
public void testRvOn1073Address() {
assert assertionsEnabled;
int res;
int[] addrList = {0x1070, 0x2070, 0x3070};
assert addrList[2] + 8 < ROM_SIZE;
for (Size size : Size.vals) {
for (int addr : addrList) {
setRv(lc, 0);
res = readBus(lc, M68K, M68K_START_ROM_MIRROR + addr, size);
//random values are guaranteed not be 0 or 0xFF
Assertions.assertTrue(res != 0 && res != size.getMask(), th(res));

res = readBus(lc, M68K, M68K_START_ROM_MIRROR_BANK + addr, size);
Assertions.assertTrue(res != 0 && res != size.getMask());

//RV=1, 1070 - 1073 cannot be read correctly, let's assume 0xFF
setRv(lc, 1);
res = readBus(lc, M68K, addr, size);
Assertions.assertTrue(res == size.getMask());

//106c, 1074 are fine
res = readBus(lc, M68K, addr - 4, size);
Assertions.assertTrue(res != 0 && res != size.getMask());
res = readBus(lc, M68K, addr + 4, size);
Assertions.assertTrue(res != 0 && res != size.getMask());
}
}

//check 0x70 works ok
int addr = 0x70;
Size size = Size.WORD;
setRv(lc, 0);
//hint vector
res = readBus(lc, M68K, addr, size);
//RV=1, 70 - 73 should be ok
setRv(lc, 1);
int res2 = readBus(lc, M68K, addr, size);
Assertions.assertFalse(res == size.getMask());
Assertions.assertEquals(res, res2);
}


private int readRomToggleRv(CpuDeviceAccess cpu, Sh2Bus sh2Mem, S32xBus mdBus, int addr) {
int val;
if (cpu.regSide == BufferUtil.S32xRegSide.SH2) {
Expand Down

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