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[xls][mlir] Support XLS fifo properties/config in MLIR channels. #1916
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This also adds support for converting these properties to/from XLS, and updates different passes (array_to_bits, index_type_conversion) to ensure these attributes are maintained when channels are modified. Finally, these properties are also exposed for sproc channels, and the proc elaboration pass is updated to assign said properties to all eproc channels that are generated from an sproc channel.
FWIW, the I/O flopping configuration values are important to many FIFO libraries - they change the way the FIFOs are instantiated. You can see one example of how it's relevant here, in our own FIFO generator: https://github.com/google/xls/blob/main/xls/codegen/materialize_fifos_pass.cc#L162 They don't need to be in v1 of this, but they should probably be added at some point! (EDIT: And if they are here, they should almost certainly stay.) |
Got it - I was not sure so I implemented them while I was at it so they are good to go :)
Just for my own understanding - I was digging around this part of codegen (also for #1896) and I still don't quite understand how As far as I can tell only Are those values somehow constructed from The only other reference I can find to those values is during the "Convert IR to Blocks" pass, which seems to construct registers on the proc blocks the channels are attached to? 1 I am asking because I have been working on a project that relies on precisely how XLS instantiates buffers, so I am trying to make sure I really understand it :) Footnotes |
I believe This is why the materialize_fifo_pass doesn't deal with FlopKinds- it only concerns itself with FIFO configurations, as FIFOs are used for internal channels, not boundary channels. The pass doesn't need access to the whole |
Another way to think of it - the FIFO config describes the FIFO that you'll need to instantiate if the channel is internal (between two XLS procs, or from a proc back to itself). The rest of the ChannelConfig describes how the proc will interact with the channel, regardless of what the FIFO actually is... e.g., whether to insert registers on the proc side of the I/O path, and how. We've had a lot of confusion around channels because of this naming issue - in different contexts, "a channel" can refer to any of:
I've been starting to think we should have disambiguating names for these. |
Thanks you two for the explaination. That really clears it up. I was very confused why the flopping was not relevant for the fifo instantiation directly. To make sure I get this right: For input(output) boundary channels:
For internal channels:
In other words - the input and output flopping is relevant for both internal and boundary channels? |
That's correct! |
As discussed via email.
Support XLS fifo properties/config in MLIR channels.
This also adds support for converting these properties to/from XLS, and updates different passes (array_to_bits, index_type_conversion) to ensure these attributes are maintained when channels are modified.
Finally, these properties are also exposed for sproc channels, and the proc elaboration pass is updated to assign said properties to all eproc channels that are generated from an sproc channel.
To be discussed: Are the input/output flopping fifo configuration values required?