Merge pull request #1420 from hermit-os/env-boot_info

fix: unify `BOOT_INFO` as `OnceCell` in `env`

src/arch/aarch64/kernel/interrupts.rs

@@ -11,18 +11,17 @@ use hashbrown::HashMap;
 use hermit_dtb::Dtb;
 use hermit_sync::{InterruptSpinMutex, InterruptTicketMutex, OnceCell};
 
-use crate::arch::aarch64::kernel::boot_info;
 use crate::arch::aarch64::kernel::core_local::increment_irq_counter;
 use crate::arch::aarch64::kernel::scheduler::State;
 use crate::arch::aarch64::mm::paging::{self, BasePageSize, PageSize, PageTableEntryFlags};
 use crate::arch::aarch64::mm::{virtualmem, PhysAddr};
-use crate::core_scheduler;
 #[cfg(not(feature = "pci"))]
 use crate::drivers::mmio::get_interrupt_handlers;
 #[cfg(feature = "pci")]
 use crate::drivers::pci::get_interrupt_handlers;
 use crate::drivers::{InterruptHandlerQueue, InterruptLine};
 use crate::scheduler::{self, CoreId};
+use crate::{core_scheduler, env};
 
 /// The ID of the first Private Peripheral Interrupt.
 const PPI_START: u8 = 16;
@@ -229,7 +228,7 @@ pub(crate) fn init() {
 
 	let dtb = unsafe {
 		Dtb::from_raw(ptr::with_exposed_provenance(
-			boot_info().hardware_info.device_tree.unwrap().get() as usize,
+			env::boot_info().hardware_info.device_tree.unwrap().get() as usize,
 		))
 		.expect(".dtb file has invalid header")
 	};

src/arch/aarch64/kernel/mod.rs

@@ -16,8 +16,6 @@ use core::arch::global_asm;
 use core::str;
 use core::sync::atomic::{AtomicU32, AtomicU64, Ordering};
 
-use hermit_entry::boot_info::BootInfo;
-
 use crate::arch::aarch64::kernel::core_local::*;
 use crate::arch::aarch64::kernel::serial::SerialPort;
 use crate::arch::aarch64::mm::{PhysAddr, VirtAddr};
@@ -37,31 +35,25 @@ pub(crate) static CURRENT_STACK_ADDRESS: AtomicU64 = AtomicU64::new(0);
 #[cfg(target_os = "none")]
 global_asm!(include_str!("start.s"));
 
-static mut BOOT_INFO: Option<BootInfo> = None;
-
-pub fn boot_info() -> &'static BootInfo {
-	unsafe { BOOT_INFO.as_ref().unwrap() }
-}
-
 pub fn is_uhyve_with_pci() -> bool {
 	false
 }
 
 pub fn get_ram_address() -> PhysAddr {
-	PhysAddr(boot_info().hardware_info.phys_addr_range.start)
+	PhysAddr(env::boot_info().hardware_info.phys_addr_range.start)
 }
 
 pub fn get_base_address() -> VirtAddr {
-	VirtAddr(boot_info().load_info.kernel_image_addr_range.start)
+	VirtAddr(env::boot_info().load_info.kernel_image_addr_range.start)
 }
 
 pub fn get_image_size() -> usize {
-	let range = &boot_info().load_info.kernel_image_addr_range;
+	let range = &env::boot_info().load_info.kernel_image_addr_range;
 	(range.end - range.start) as usize
 }
 
 pub fn get_limit() -> usize {
-	boot_info().hardware_info.phys_addr_range.end as usize
+	env::boot_info().hardware_info.phys_addr_range.end as usize
 }
 
 #[cfg(feature = "smp")]
@@ -88,7 +80,7 @@ pub fn message_output_init() {
 	CoreLocal::install();
 
 	unsafe {
-		COM1.port_address = boot_info()
+		COM1.port_address = env::boot_info()
 			.hardware_info
 			.serial_port_base
 			.map(|uartport| uartport.get())

src/arch/aarch64/kernel/pci.rs

@@ -13,7 +13,7 @@ use crate::arch::aarch64::kernel::interrupts::GIC;
 use crate::arch::aarch64::mm::paging::{self, BasePageSize, PageSize, PageTableEntryFlags};
 use crate::arch::aarch64::mm::{virtualmem, PhysAddr, VirtAddr};
 use crate::drivers::pci::{PciDevice, PCI_DEVICES};
-use crate::kernel::boot_info;
+use crate::env;
 
 const PCI_MAX_DEVICE_NUMBER: u8 = 32;
 const PCI_MAX_FUNCTION_NUMBER: u8 = 8;
@@ -224,7 +224,7 @@ fn detect_interrupt(
 pub fn init() {
 	let dtb = unsafe {
 		Dtb::from_raw(core::ptr::with_exposed_provenance(
-			boot_info().hardware_info.device_tree.unwrap().get() as usize,
+			env::boot_info().hardware_info.device_tree.unwrap().get() as usize,
 		))
 		.expect(".dtb file has invalid header")
 	};

src/arch/aarch64/kernel/processor.rs

@@ -5,7 +5,6 @@ use aarch64::regs::{Readable, CNTFRQ_EL0};
 use hermit_dtb::Dtb;
 use hermit_sync::{without_interrupts, Lazy};
 
-use crate::arch::aarch64::kernel::boot_info;
 use crate::env;
 
 // System counter frequency in Hz
@@ -253,7 +252,7 @@ pub fn set_oneshot_timer(wakeup_time: Option<u64>) {
 pub fn print_information() {
 	let dtb = unsafe {
 		Dtb::from_raw(core::ptr::with_exposed_provenance(
-			boot_info().hardware_info.device_tree.unwrap().get() as usize,
+			env::boot_info().hardware_info.device_tree.unwrap().get() as usize,
 		))
 		.expect(".dtb file has invalid header")
 	};

src/arch/aarch64/kernel/scheduler.rs

@@ -15,7 +15,7 @@ use crate::arch::aarch64::mm::{PhysAddr, VirtAddr};
 use crate::scheduler::task::{Task, TaskFrame};
 #[cfg(target_os = "none")]
 use crate::scheduler::PerCoreSchedulerExt;
-use crate::{kernel, DEFAULT_STACK_SIZE, KERNEL_STACK_SIZE};
+use crate::{env, DEFAULT_STACK_SIZE, KERNEL_STACK_SIZE};
 
 #[derive(Debug)]
 #[repr(C, packed)]
@@ -266,7 +266,7 @@ pub struct TaskTLS {
 
 impl TaskTLS {
 	fn from_environment() -> Option<Box<Self>> {
-		let tls_info = kernel::boot_info().load_info.tls_info?;
+		let tls_info = env::boot_info().load_info.tls_info?;
 		assert_ne!(tls_info.memsz, 0);
 
 		// Get TLS initialization image

src/arch/aarch64/kernel/start.rs

@@ -1,11 +1,10 @@
 use core::arch::asm;
 
-use hermit_entry::boot_info::{BootInfo, RawBootInfo};
+use hermit_entry::boot_info::RawBootInfo;
 use hermit_entry::Entry;
 
 use crate::arch::aarch64::kernel::scheduler::TaskStacks;
-use crate::arch::aarch64::kernel::BOOT_INFO;
-use crate::KERNEL_STACK_SIZE;
+use crate::{env, KERNEL_STACK_SIZE};
 
 extern "C" {
 	static vector_table: u8;
@@ -70,9 +69,7 @@ unsafe extern "C" fn pre_init(boot_info: Option<&'static RawBootInfo>, cpu_id: u
 	}
 
 	if cpu_id == 0 {
-		unsafe {
-			BOOT_INFO = Some(BootInfo::from(*boot_info.unwrap()));
-		}
+		env::set_boot_info(*boot_info.unwrap());
 		crate::boot_processor_main()
 	} else {
 		#[cfg(not(feature = "smp"))]

src/arch/aarch64/kernel/systemtime.rs

@@ -10,7 +10,7 @@ use time::OffsetDateTime;
 
 use crate::arch::aarch64::mm::paging::{self, BasePageSize, PageSize, PageTableEntryFlags};
 use crate::arch::aarch64::mm::{virtualmem, PhysAddr, VirtAddr};
-use crate::kernel::boot_info;
+use crate::env;
 
 static PL031_ADDRESS: OnceCell<VirtAddr> = OnceCell::new();
 static BOOT_TIME: OnceCell<u64> = OnceCell::new();
@@ -47,7 +47,7 @@ fn rtc_read(off: usize) -> u32 {
 pub fn init() {
 	let dtb = unsafe {
 		Dtb::from_raw(core::ptr::with_exposed_provenance(
-			boot_info().hardware_info.device_tree.unwrap().get() as usize,
+			env::boot_info().hardware_info.device_tree.unwrap().get() as usize,
 		))
 		.expect(".dtb file has invalid header")
 	};

src/arch/riscv64/kernel/mod.rs

@@ -16,8 +16,6 @@ use core::ptr;
 use core::sync::atomic::{AtomicPtr, AtomicU32, AtomicU64, Ordering};
 
 use fdt::Fdt;
-use hermit_entry::boot_info::BootInfo;
-use hermit_sync::OnceCell;
 use riscv::register::sstatus;
 
 use crate::arch::riscv64::kernel::core_local::{core_id, CoreLocal};
@@ -32,7 +30,6 @@ use crate::env;
 pub(crate) static mut HARTS_AVAILABLE: Vec<usize> = Vec::new();
 
 /// Kernel header to announce machine features
-static BOOT_INFO: OnceCell<BootInfo> = OnceCell::new();
 static CPU_ONLINE: AtomicU32 = AtomicU32::new(0);
 static CURRENT_BOOT_ID: AtomicU32 = AtomicU32::new(0);
 static CURRENT_STACK_ADDRESS: AtomicPtr<()> = AtomicPtr::new(ptr::null_mut());
@@ -41,26 +38,22 @@ static NUM_CPUS: AtomicU32 = AtomicU32::new(0);
 
 // FUNCTIONS
 
-pub fn boot_info() -> &'static BootInfo {
-	BOOT_INFO.get().unwrap()
-}
-
 pub fn is_uhyve_with_pci() -> bool {
 	false
 }
 
 pub fn get_ram_address() -> PhysAddr {
-	PhysAddr(boot_info().hardware_info.phys_addr_range.start)
+	PhysAddr(env::boot_info().hardware_info.phys_addr_range.start)
 }
 
 pub fn get_image_size() -> usize {
-	(boot_info().load_info.kernel_image_addr_range.end
-		- boot_info().load_info.kernel_image_addr_range.start) as usize
+	(env::boot_info().load_info.kernel_image_addr_range.end
+		- env::boot_info().load_info.kernel_image_addr_range.start) as usize
 }
 
 pub fn get_limit() -> usize {
-	(boot_info().hardware_info.phys_addr_range.end
-		- boot_info().hardware_info.phys_addr_range.start) as usize
+	(env::boot_info().hardware_info.phys_addr_range.end
+		- env::boot_info().hardware_info.phys_addr_range.start) as usize
 }
 
 #[cfg(feature = "smp")]
@@ -79,15 +72,15 @@ pub fn get_processor_count() -> u32 {
 }
 
 pub fn get_base_address() -> VirtAddr {
-	VirtAddr(boot_info().load_info.kernel_image_addr_range.start)
+	VirtAddr(env::boot_info().load_info.kernel_image_addr_range.start)
 }
 
 pub fn args() -> Option<&'static str> {
 	None
 }
 
 pub fn get_dtb_ptr() -> *const u8 {
-	boot_info().hardware_info.device_tree.unwrap().get() as _
+	env::boot_info().hardware_info.device_tree.unwrap().get() as _
 }
 
 pub fn get_hart_mask() -> u64 {

src/arch/riscv64/kernel/scheduler.rs

@@ -5,13 +5,12 @@ use core::{mem, ptr};
 
 use align_address::Align;
 
-use crate::arch::riscv64::kernel::boot_info;
 use crate::arch::riscv64::kernel::core_local::core_scheduler;
 use crate::arch::riscv64::kernel::processor::set_oneshot_timer;
 use crate::arch::riscv64::mm::paging::{BasePageSize, PageSize, PageTableEntryFlags};
 use crate::arch::riscv64::mm::{PhysAddr, VirtAddr};
 use crate::scheduler::task::{Task, TaskFrame};
-use crate::{DEFAULT_STACK_SIZE, KERNEL_STACK_SIZE};
+use crate::{env, DEFAULT_STACK_SIZE, KERNEL_STACK_SIZE};
 
 #[repr(C, packed)]
 #[derive(Clone, Copy, Debug)]
@@ -272,7 +271,7 @@ pub struct TaskTLS {
 
 impl TaskTLS {
 	pub fn from_environment() -> Option<Box<Self>> {
-		let tls_info = boot_info().load_info.tls_info?;
+		let tls_info = env::boot_info().load_info.tls_info?;
 		assert_ne!(tls_info.memsz, 0);
 
 		let tls_size = tls_info.memsz as usize;

src/arch/riscv64/kernel/start.rs

@@ -8,8 +8,8 @@ use hermit_entry::Entry;
 use super::{get_dtb_ptr, CPU_ONLINE, CURRENT_BOOT_ID, HART_MASK, NUM_CPUS};
 #[cfg(not(feature = "smp"))]
 use crate::arch::riscv64::kernel::processor;
-use crate::arch::riscv64::kernel::{BootInfo, BOOT_INFO, CURRENT_STACK_ADDRESS};
-use crate::KERNEL_STACK_SIZE;
+use crate::arch::riscv64::kernel::CURRENT_STACK_ADDRESS;
+use crate::{env, KERNEL_STACK_SIZE};
 
 //static mut BOOT_STACK: [u8; KERNEL_STACK_SIZE] = [0; KERNEL_STACK_SIZE];
 
@@ -54,7 +54,7 @@ unsafe extern "C" fn pre_init(hart_id: usize, boot_info: Option<&'static RawBoot
 
 	if CPU_ONLINE.load(Ordering::Acquire) == 0 {
 		unsafe {
-			BOOT_INFO.set(BootInfo::from(*boot_info.unwrap())).unwrap();
+			env::set_boot_info(*boot_info.unwrap());
 			let fdt = Fdt::from_ptr(get_dtb_ptr()).expect("FDT is invalid");
 			// Init HART_MASK
 			let mut hart_mask = 0;

src/arch/x86_64/kernel/mod.rs

@@ -5,7 +5,7 @@ use core::ptr;
 use core::sync::atomic::{AtomicPtr, AtomicU32, Ordering};
 
 use fdt::Fdt;
-use hermit_entry::boot_info::{BootInfo, PlatformInfo, RawBootInfo};
+use hermit_entry::boot_info::{PlatformInfo, RawBootInfo};
 use hermit_sync::InterruptSpinMutex;
 use x86::controlregs::{cr0, cr0_write, cr4, Cr0};
 
@@ -38,34 +38,28 @@ pub(crate) mod systemtime;
 #[cfg(feature = "vga")]
 mod vga;
 
-static mut BOOT_INFO: Option<BootInfo> = None;
-
-pub fn boot_info() -> &'static BootInfo {
-	unsafe { BOOT_INFO.as_ref().unwrap() }
-}
-
 /// Serial port to print kernel messages
 pub(crate) static COM1: InterruptSpinMutex<Option<SerialPort>> = InterruptSpinMutex::new(None);
 
 pub fn get_ram_address() -> PhysAddr {
-	PhysAddr(boot_info().hardware_info.phys_addr_range.start)
+	PhysAddr(env::boot_info().hardware_info.phys_addr_range.start)
 }
 
 pub fn get_base_address() -> VirtAddr {
-	VirtAddr(boot_info().load_info.kernel_image_addr_range.start)
+	VirtAddr(env::boot_info().load_info.kernel_image_addr_range.start)
 }
 
 pub fn get_image_size() -> usize {
-	let range = &boot_info().load_info.kernel_image_addr_range;
+	let range = &env::boot_info().load_info.kernel_image_addr_range;
 	(range.end - range.start) as usize
 }
 
 pub fn get_limit() -> usize {
-	boot_info().hardware_info.phys_addr_range.end as usize
+	env::boot_info().hardware_info.phys_addr_range.end as usize
 }
 
 pub fn get_mbinfo() -> Option<NonZeroU64> {
-	match boot_info().platform_info {
+	match env::boot_info().platform_info {
 		PlatformInfo::Multiboot {
 			multiboot_info_addr,
 			..
@@ -75,7 +69,7 @@ pub fn get_mbinfo() -> Option<NonZeroU64> {
 }
 
 pub fn get_fdt() -> Option<Fdt<'static>> {
-	boot_info().hardware_info.device_tree.map(|fdt| {
+	env::boot_info().hardware_info.device_tree.map(|fdt| {
 		let ptr = ptr::with_exposed_provenance(fdt.get().try_into().unwrap());
 		unsafe { Fdt::from_ptr(ptr).unwrap() }
 	})
@@ -85,7 +79,7 @@ pub fn get_fdt() -> Option<Fdt<'static>> {
 pub fn get_possible_cpus() -> u32 {
 	use core::cmp;
 
-	match boot_info().platform_info {
+	match env::boot_info().platform_info {
 		// FIXME: Remove get_processor_count after a transition period for uhyve 0.1.3 adoption
 		PlatformInfo::Uhyve { num_cpus, .. } => cmp::max(
 			u32::try_from(num_cpus.get()).unwrap(),
@@ -107,13 +101,13 @@ pub fn get_processor_count() -> u32 {
 
 pub fn is_uhyve_with_pci() -> bool {
 	matches!(
-		boot_info().platform_info,
+		env::boot_info().platform_info,
 		PlatformInfo::Uhyve { has_pci: true, .. }
 	)
 }
 
 pub fn args() -> Option<&'static str> {
-	match boot_info().platform_info {
+	match env::boot_info().platform_info {
 		PlatformInfo::Multiboot { command_line, .. } => command_line,
 		PlatformInfo::LinuxBootParams { command_line, .. } => command_line,
 		_ => None,
@@ -126,7 +120,11 @@ pub fn args() -> Option<&'static str> {
 pub fn message_output_init() {
 	CoreLocal::install();
 
-	let base = boot_info().hardware_info.serial_port_base.unwrap().get();
+	let base = env::boot_info()
+		.hardware_info
+		.serial_port_base
+		.unwrap()
+		.get();
 	let serial_port = unsafe { SerialPort::new(base) };
 	*COM1.lock() = Some(serial_port);
 }
@@ -256,9 +254,7 @@ unsafe extern "C" fn pre_init(boot_info: Option<&'static RawBootInfo>, cpu_id: u
 	}
 
 	if cpu_id == 0 {
-		unsafe {
-			BOOT_INFO = Some(BootInfo::from(*boot_info.unwrap()));
-		}
+		env::set_boot_info(*boot_info.unwrap());
 
 		crate::boot_processor_main()
 	} else {