Naming convention of the Macro Assemblers in v8z

The idea is to get close to ppc naming convention.

1. on 31bit, destination arithmetic and logical operations are 32bit in size
2. on 64bit, they are 64bit in size.
3. Load/Store/Add/Sub/Cmp have macro assembler versions. Depending the situation, it might generate different instructions. The format is: “Op” + “l”(optional, if it is logical operation) + “size”.
4. The “Op” part specifies the type of operation, while the “size” part specifies the length of the second operand (memory operand, constant or register). Could be: Register®/DWord(DW)/Word(W)/Short(S)/Byte(B)/Pointer or Pointer size(P)/Floating Point—64bit(F). If not specified, the memory operand is 32bit in length.
5. The name should also specify the type of the operation by appending ‘l’ to indicate it is a logical operation. If not specified, it is arithmetic.
6. Examples: CmpDW — compare a register with a 64bit operand; AddlS — add short to register with zero sign extension.