Complete Preemptive Multitasking

CMakeLists.txt

@@ -46,6 +46,8 @@ set(KERNEL_SYSCALL_PATH     "${KERNEL_PATH}/syscall")
 set(KERNEL_EXCEPTION_PATH   "${KERNEL_PATH}/exception")
 set(KERNEL_PROCESS_PATH     "${KERNEL_PATH}/process")
 set(KERNEL_SCHED_PATH       "${KERNEL_PATH}/sched")
+set(KERNEL_IPC_PATH         "${KERNEL_PATH}/ipc")
+set(KERNEL_TESTS_PATH       "${KERNEL_PATH}/tests")
 
 include_directories(".")
 include_directories("${KERNEL_PATH}")
@@ -56,6 +58,8 @@ add_subdirectory("${KERNEL_PROCESS_PATH}")
 add_subdirectory("${KERNEL_SYSCALL_PATH}")
 add_subdirectory("${KERNEL_EXCEPTION_PATH}")
 add_subdirectory("${KERNEL_SCHED_PATH}")
+add_subdirectory("${KERNEL_IPC_PATH}")
+add_subdirectory("${KERNEL_TESTS_PATH}")
 
 set(BINARY_KERNEL_IMG_PATH "CMakeFiles/kernel.img.dir")
 set(init_object
@@ -79,6 +83,8 @@ add_executable(kernel.img ${files}
     $<TARGET_OBJECTS:${PROJECT_NAME}-syscall>
     $<TARGET_OBJECTS:${PROJECT_NAME}-sched>
     $<TARGET_OBJECTS:${PROJECT_NAME}-exception>
+    $<TARGET_OBJECTS:${PROJECT_NAME}-ipc>
+    $<TARGET_OBJECTS:${PROJECT_NAME}-tests>
     ${USER_PATH}/binary_include.S
 )
 

Makefile

@@ -3,7 +3,7 @@ ifndef QEMU
 QEMU := qemu-system-aarch64
 endif
 
-LAB := 3
+LAB := 4
 # try to generate a unique GDB port
 GDBPORT	:= 1234
 QEMUOPTS = -machine raspi3 -serial null -serial mon:stdio -m size=1G -kernel $(BUILD_DIR)/kernel.img -gdb tcp::1234
@@ -33,6 +33,7 @@ qemu-gdb: $(IMAGES)
 gdbport:
 	@echo $(GDBPORT)
 
+
 docker: FORCE	
 	./scripts/run_docker.sh
 

boot/boot.h

@@ -4,6 +4,7 @@ extern void el1_mmu_activate(void);
 extern void init_boot_pt(void);
 
 extern void start_kernel(void *boot_flag);
+extern void secondary_cpu_boot(int cpuid);
 
 extern char _bss_start;
 extern char _bss_end;

boot/init_c.c

@@ -24,6 +24,30 @@ volatile u64 clear_bss_flag = NOT_BSS;
 void early_uart_init(void);
 void uart_send_string(char *);
 
+static void wakeup_other_cores(void)
+{
+	u64 *addr;
+
+	/*
+	 * Set the entry address for non-primary cores.
+	 * 0xe0, 0xe8, 0xf0 are fixed in the firmware (armstub8.bin).
+	 */
+	// addr = (u64 *)0xd8;
+	// *addr = TEXT_OFFSET;
+	addr = (u64 *) 0xe0;
+	*addr = TEXT_OFFSET;
+	addr = (u64 *) 0xe8;
+	*addr = TEXT_OFFSET;
+	addr = (u64 *) 0xf0;
+	*addr = TEXT_OFFSET;
+
+	/*
+	 * Instruction sev (set event) for waking up other (non-primary) cores
+	 * that executes wfe instruction.
+	 */
+	asm volatile ("sev");
+}
+
 static void clear_bss(void)
 {
 	u64 bss_start_addr;
@@ -48,6 +72,8 @@ void init_c(void)
 	early_uart_init();
 	uart_send_string("boot: init_c\r\n");
 
+	wakeup_other_cores();
+
 	/* Initialize Boot Page Table. */
 	uart_send_string("[BOOT] Install boot page table\r\n");
 	init_boot_pt();
@@ -62,3 +88,9 @@ void init_c(void)
 
 	/* Never reach here */
 }
+
+void secondary_init_c(int cpuid)
+{
+	el1_mmu_activate();
+	secondary_cpu_boot(cpuid);
+}

boot/start.S

@@ -3,6 +3,7 @@
 .extern arm64_elX_to_el1
 .extern boot_cpu_stack
 .extern secondary_boot_flag
+.extern secondary_init_c
 .extern clear_bss_flag
 .extern init_c
 
@@ -11,9 +12,36 @@ BEGIN_FUNC(_start)
 	and	x8, x8,	#0xFF
 	cbz	x8, primary
 
-  /* hang all secondary processors before we intorduce multi-processors */
-secondary_hang:
-	bl secondary_hang
+	/* Wait for bss clear */
+wait_for_bss_clear:
+	adr	x0, clear_bss_flag
+	ldr	x1, [x0]
+	cmp     x1, #0
+	bne	wait_for_bss_clear
+
+	/* Turn to el1 from other exception levels. */
+	bl 	arm64_elX_to_el1
+
+	/* Prepare stack pointer and jump to C. */
+	mov	x1, #0x1000
+	mul	x1, x8, x1
+	adr 	x0, boot_cpu_stack
+	add	x0, x0, x1
+	add	x0, x0, #0x1000
+        mov	sp, x0
+
+wait_until_smp_enabled:
+	/* CPU ID should be stored in x8 from the first line */
+	mov	x1, #8
+	mul	x2, x8, x1
+	ldr	x1, =secondary_boot_flag
+	add	x1, x1, x2
+	ldr	x3, [x1]
+	cbz	x3, wait_until_smp_enabled
+
+	/* Set CPU id */
+	mov	x0, x8
+	bl 	secondary_init_c
 
 primary:
 

kernel/CMakeLists.txt

@@ -5,9 +5,12 @@ add_library(${PROJECT_NAME}-arch process
     main.c
     monitor.c
     common/tools.S
+    common/smp.c
     common/cpio.c
     common/elf.c
     common/uart.c
+    common/lock.c
     common/printk.c
+    common/fs.c
     common/radix.c
 )

kernel/common/fs.c

@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2020 Institute of Parallel And Distributed Systems (IPADS), Shanghai Jiao Tong University (SJTU)
+ * OS-Lab-2020 (i.e., ChCore) is licensed under the Mulan PSL v1.
+ * You can use this software according to the terms and conditions of the Mulan PSL v1.
+ * You may obtain a copy of Mulan PSL v1 at:
+ *   http://license.coscl.org.cn/MulanPSL
+ *   THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
+ *   IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
+ *   PURPOSE.
+ *   See the Mulan PSL v1 for more details.
+ */
+#include <common/fs.h>
+#include <process/capability.h>
+#include <process/process.h>
+#include <process/thread.h>
+#include <common/uaccess.h>
+#include <common/kmalloc.h>
+#include <common/mm.h>
+#include <mm/vmspace.h>
+
+int sys_fs_load_cpio(u64 vaddr)
+{
+	struct pmobject *cpio_pmo;
+	struct vmspace *vmspace;
+	int cpio_pmo_cap, ret;
+	size_t len;
+
+	cpio_pmo = obj_alloc(TYPE_PMO, sizeof(*cpio_pmo));
+	if (!cpio_pmo) {
+		return -ENOMEM;
+	}
+	len = ROUND_UP(binary_cpio_bin_size, PAGE_SIZE);
+	pmo_init(cpio_pmo, PMO_DATA, len, 0);
+
+	cpio_pmo_cap = cap_alloc(current_process, cpio_pmo, 0);
+	if (cpio_pmo_cap < 0) {
+		obj_free(cpio_pmo);
+		return -ENOMEM;
+	}
+
+	vmspace = obj_get(current_process, VMSPACE_OBJ_ID, TYPE_VMSPACE);
+
+	ret = vmspace_map_range(vmspace, vaddr, len, VMR_READ, cpio_pmo);
+	memcpy((void *)phys_to_virt(cpio_pmo->start),
+	       &binary_cpio_bin_start, binary_cpio_bin_size);
+
+	obj_put(vmspace);
+	return ret;
+}

kernel/common/fs.h

@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2020 Institute of Parallel And Distributed Systems (IPADS), Shanghai Jiao Tong University (SJTU)
+ * OS-Lab-2020 (i.e., ChCore) is licensed under the Mulan PSL v1.
+ * You can use this software according to the terms and conditions of the Mulan PSL v1.
+ * You may obtain a copy of Mulan PSL v1 at:
+ *   http://license.coscl.org.cn/MulanPSL
+ *   THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
+ *   IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
+ *   PURPOSE.
+ *   See the Mulan PSL v1 for more details.
+ */
+
+#pragma once
+
+#include <common/types.h>
+
+/* RAMDISK symbol */
+extern const char binary_cpio_bin_start;
+extern size_t binary_cpio_bin_size;
+
+int sys_fs_load_cpio(u64 vaddr);

kernel/common/lock.c

@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2020 Institute of Parallel And Distributed Systems (IPADS),
+ * Shanghai Jiao Tong University (SJTU) OS-Lab-2020 (i.e., ChCore) is licensed
+ * under the Mulan PSL v1. You can use this software according to the terms and
+ * conditions of the Mulan PSL v1. You may obtain a copy of Mulan PSL v1 at:
+ *   http://license.coscl.org.cn/MulanPSL
+ *   THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY
+ * KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO
+ * NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. See the
+ * Mulan PSL v1 for more details.
+ */
+
+#include <common/smp.h>
+#include <common/sync.h>
+#include <common/errno.h>
+#include <common/kprint.h>
+#include <common/lock.h>
+#include <common/macro.h>
+#include <common/types.h>
+
+struct lock big_kernel_lock;
+
+int lock_init(struct lock *lock)
+{
+	BUG_ON(!lock);
+	/* Initialize ticket lock */
+	lock->owner = 0;
+	lock->next = 0;
+	return 0;
+}
+
+/**
+ * Lock the ticket lock
+ * This function will block until the lock is held
+ */
+void lock(struct lock *lock)
+{
+	u32 lockval = 0, newval = 0, ret = 0;
+
+	BUG_ON(!lock);
+
+	/**
+	 * The following asm code means:
+	 * 
+	 * lock->next = fetch_and_add(1);
+	 * while(lock->next != lock->owner);
+	 */
+	asm volatile ("       prfm    pstl1strm, %3\n"
+		      "1:     ldaxr   %w0, %3\n"
+		      "       add     %w1, %w0, #0x1\n"
+		      "       stxr    %w2, %w1, %3\n"
+		      "       cbnz    %w2, 1b\n"
+		      "2:     ldar    %w2, %4\n"
+		      "       cmp     %w0, %w2\n"
+		      "       b.ne    2b\n":"=&r" (lockval), "=&r"(newval),
+		      "=&r"(ret), "+Q"(lock->next)
+		      :"Q"(lock->owner)
+		      :"memory");
+}
+
+/**
+ * Try to lock the ticket lock
+ * Return 0 if succeed, -1 otherwise
+ */
+int try_lock(struct lock *lock)
+{
+
+	u32 lockval = 0, newval = 0, ret = 0, ownerval = 0;
+
+	BUG_ON(!lock);
+	asm volatile ("       prfm    pstl1strm, %4\n" "       ldaxr   %w0, %4\n" "       ldar    %w3, %5\n" "       add     %w1, %w0, #0x1\n" "       cmp     %w0, %w3\n" "       b.ne    1f\n" "       stxr    %w2, %w1, %4\n" "       cbz     %w2, 2f\n" "1:     mov     %w2, #0xffffffffffffffff\n"	/* fail */
+		      "       b       3f\n" "2:     mov     %w2, #0x0\n"	/* success */
+		      "       dmb     ish\n"	/* barrier */
+		      "3:\n":"=&r" (lockval), "=&r"(newval), "=&r"(ret),
+		      "=&r"(ownerval), "+Q"(lock->next)
+		      :"Q"(lock->owner)
+		      :"memory");
+	return ret;
+}
+
+/**
+ * Unlock the ticket lock
+ */
+void unlock(struct lock *lock)
+{
+	BUG_ON(!lock);
+	asm volatile ("dmb ish");
+
+	/**
+	 * Unlock the ticket lock here
+	 * Your code should be no more than 5 lines
+	 */
+	lock->owner++;
+}
+
+/**
+ * Check whether the ticket lock is locked
+ * Return 1 if locked, 0 otherwise
+ * Your code should be no more than 5 lines
+ */
+int is_locked(struct lock *lock)
+{
+	return lock->owner != lock->next;
+}
+
+/**
+ * Initialization of the big kernel lock
+ */
+void kernel_lock_init(void)
+{
+	lock_init(&big_kernel_lock);
+}
+
+/**
+ * Acquire the big kernel lock
+ */
+void lock_kernel(void)
+{
+	lock(&big_kernel_lock);
+}
+
+/**
+ * Release the big kernel lock
+ */
+void unlock_kernel(void)
+{
+	unlock(&big_kernel_lock);
+}

kernel/common/lock.h

@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2020 Institute of Parallel And Distributed Systems (IPADS), Shanghai Jiao Tong University (SJTU)
+ * OS-Lab-2020 (i.e., ChCore) is licensed under the Mulan PSL v1.
+ * You can use this software according to the terms and conditions of the Mulan PSL v1.
+ * You may obtain a copy of Mulan PSL v1 at:
+ *   http://license.coscl.org.cn/MulanPSL
+ *   THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
+ *   IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
+ *   PURPOSE.
+ *   See the Mulan PSL v1 for more details.
+ */
+
+#pragma once
+
+#include <common/types.h>
+
+struct lock {
+	volatile u32 owner;
+	char pad0[pad_to_cache_line(sizeof(u32))];
+
+	volatile u32 next;
+	char pad1[pad_to_cache_line(sizeof(u32))];
+} __attribute__ ((aligned(CACHELINE_SZ)));
+
+int lock_init(struct lock *lock);
+void lock(struct lock *lock);
+int try_lock(struct lock *lock);
+void unlock(struct lock *lock);
+int is_locked(struct lock *lock);
+
+/* Global locks */
+extern struct lock big_kernel_lock;
+void kernel_lock_init(void);
+void lock_kernel(void);
+void unlock_kernel(void);