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[crypto] Let otcrypto_aes() have up to 3 blocks in flight #24722

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vogelpi
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@vogelpi vogelpi commented Oct 3, 2024

Previously, the hot loop inside otcrypto_aes() would only ever have 2 blocks in flight while the underlying driver function aes_update() as well as the hardware allows up to 3 blocks being in flight:

  • Block x-1 can be retrieved from the data output registers by SW.
  • Block x is being processed by HW.
  • Block x+1 can already be provided via the data input registers by SW.

Doing this is better for SCA hardening (more concurrency means more background noise) and allows achieving higher throughput.

This is related to #20308.

This is a cherry pick of commit 8f0f500 to branch earlgrey_es_sival.

Previously, the hot loop inside otcrypto_aes() would only ever have 2
blocks in flight while the underlying driver function aes_update() as
well as the hardware allows up to 3 blocks being in flight:
- Block x-1 can be retrieved from the data output registers by SW.
- Block x   is being processed by HW.
- Block x+1 can already be provided via the data input registers by SW.

Doing this is better for SCA hardening (more concurrency means more
background noise) and allows achieving higher throughput.

This is related to lowRISC#20308.

This is a cherry pick of commit 8f0f500
to branch earlgrey_es_sival.

Signed-off-by: Pirmin Vogel <[email protected]>
@vogelpi vogelpi requested a review from a team as a code owner October 3, 2024 09:17
@vogelpi vogelpi requested review from HU90m and jadephilipoom and removed request for a team October 3, 2024 09:17
@vogelpi
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vogelpi commented Oct 3, 2024

Thanks for your approval @jadephilipoom .

CI passes except for the sysrst_ctrl_in_irq_test_fpga_cw310_sival test. But I see the same test is failing also for other CI runs, e.g., #24712. I am thus merging this one here.

@vogelpi vogelpi merged commit 76d46d4 into lowRISC:earlgrey_es_sival Oct 3, 2024
23 of 25 checks passed
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2 participants