Add glitch filter design for I2C SCL and SDA Lines #28482
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Hi All,
I've implemented a glitch filter for the I²C core to filter the SCL and SDA lines, improving noise robustness and ensuring compliance with the I²C specification (UM10204 §3.2.3). The design ensures that both lines remain stable during valid transitions, effectively rejecting short glitches.
The detailed explanation and waveforms are present in the google doc attached below. I’d really appreciate any comments or suggestions on improving the design, timing behavior, or overall integration within the I²C core.
Thanks,
Sohan Sai
Google Doc: https://docs.google.com/document/d/19hkUFaqMAJH2dpYH56lC1JZGZ3TkixecQj2qOuO8z58/edit?usp=sharing