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Reduce CW340 bootstrap SPI clock speed #28801

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Reduce CW340 bootstrap SPI clock speed #28801

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5 changes: 4 additions & 1 deletion sw/host/opentitanlib/src/app/config/hyperdebug_cw340.json
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Original file line number Diff line number Diff line change
Expand Up @@ -88,7 +88,10 @@
"spi": [
{
"name": "BOOTSTRAP",
"bits_per_sec": 5000000,
// The current speed accounts for increased bus capacitance caused by the external
// SPI_TPM wires. If these wires are not connected (e.g., when skipping TPM tests),
// the SPI speed can safely be increased to 5MHz.
"bits_per_sec": 4000000,
"chip_select": "CN10_6",
"alias_of": "QSPI"
}
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