[capture] Enable uJSON for OTBN

This commit enables communication with the OTBN SCA code over uJSON. Currently, the ECC256 Keygen SCA test is supported. The device code is located in lowRISC/opentitan#22190. Signed-off-by: Pascal Nasahl <[email protected]>
lowRISC · Apr 17, 2024 · 7d0dc05 · 7d0dc05
1 parent c4575d2
commit 7d0dc05
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diff --git a/.github/workflows/fpga.yml b/.github/workflows/fpga.yml
@@ -148,6 +148,65 @@ jobs:
           name: traces_sha3_random_cw310_ujson
           path: ./ci/projects/sha3_sca_random_cw310_ujson.html
 
+  otbn_sca_capture_cw310:
+    name: Capture OTBN SCA traces (CW310)
+    runs-on: [ubuntu-22.04-fpga, cw310]
+    timeout-minutes: 30
+
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          lfs: true
+
+      - name: Install python dependencies
+        run: |
+          python3 -m pip install --user -r python-requirements.txt
+          mkdir -p ci/projects
+
+      - name: Capture OTBN Vertical Keygen traces (simpleserial)
+        working-directory: ci
+        run: |
+          ../capture/capture_otbn.py -c cfg/ci_otbn_sca_vertical_keygen_cw310_simpleserial.yaml -p projects/otbn_sca_vertical_keygen_cw310_simpleserial
+
+      - name: Upload OTBN Vertical Keygen traces (simpleserial)
+        uses: actions/upload-artifact@v4
+        with:
+          name: traces_otbn_sca_vertical_keygen_cw310_simpleserial
+          path: ./ci/projects/otbn_sca_vertical_keygen_cw310_simpleserial.html
+
+      - name: Capture OTBN Vertical Keygen traces (ujson)
+        working-directory: ci
+        run: |
+          ../capture/capture_otbn.py -c cfg/ci_otbn_sca_vertical_keygen_cw310_ujson.yaml -p projects/otbn_sca_vertical_keygen_cw310_ujson
+
+      - name: Upload OTBN Vertical Keygen traces (ujson)
+        uses: actions/upload-artifact@v4
+        with:
+          name: traces_otbn_sca_vertical_keygen_cw310_ujson
+          path: ./ci/projects/otbn_sca_vertical_keygen_cw310_ujson.html
+
+      - name: Capture OTBN Vertical Modinv traces (simpleserial)
+        working-directory: ci
+        run: |
+          ../capture/capture_otbn.py -c cfg/ci_otbn_sca_vertical_modinv_cw310_simpleserial.yaml -p projects/otbn_sca_vertical_modinv_cw310_simpleserial
+
+      - name: Upload OTBN Vertical Modinv traces (simpleserial)
+        uses: actions/upload-artifact@v4
+        with:
+          name: traces_otbn_sca_vertical_modinv_cw310_simpleserial
+          path: ./ci/projects/otbn_sca_vertical_modinv_cw310_simpleserial.html
+
+      - name: Capture OTBN Vertical Modinv traces (ujson)
+        working-directory: ci
+        run: |
+          ../capture/capture_otbn.py -c cfg/ci_otbn_sca_vertical_modinv_cw310_ujson.yaml -p projects/otbn_sca_vertical_modinv_cw310_ujson
+
+      - name: Upload OTBN Vertical Modinv traces (ujson)
+        uses: actions/upload-artifact@v4
+        with:
+          name: traces_otbn_sca_vertical_modinv_cw310_ujson
+          path: ./ci/projects/otbn_sca_vertical_modinv_cw310_ujson.html
+
   sca_capture_cw305:
     name: Capture AES SCA traces (CW305)
     runs-on: [ubuntu-22.04-fpga, cw305]

diff --git a/capture/capture_otbn.py b/capture/capture_otbn.py
diff --git a/capture/configs/otbn_ecc256_keygen_cw310.yaml b/capture/configs/otbn_ecc256_keygen_cw310.yaml
@@ -0,0 +1,46 @@
+target:
+  target_type: cw310
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  force_program_bitstream: True
+  fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  # target_clk_mult is a hardcoded value in the bitstream. Do not change.
+  target_clk_mult: 0.24
+  target_freq: 24000000
+  baudrate: 115200
+  output_len_bytes: 40
+  protocol: "ujson"
+  port: "/dev/ttyACM1"
+husky:
+  sampling_rate: 200000000
+  num_segments: 10
+  num_cycles: 1075
+  offset_cycles: 0
+  scope_gain: 24
+  adc_mul: 1
+  decimate: 1
+waverunner:
+  waverunner_ip: 100.107.71.10
+  num_segments: 1
+  num_samples: 6000
+  sample_offset: 0
+capture:
+  scope_select: husky
+  show_plot: True
+  plot_traces: 100
+  num_traces: 1000000
+  trace_threshold: 110000
+  trace_db: ot_trace_library
+test:
+  batch_prng_seed: 0
+  key_len_bytes: 40
+  text_len_bytes: 40
+  plain_text_len_bytes: 40
+  masks_on: True
+  # Currently, 'p256' is the only supported curve.
+  curve: p256
+  # Select the OTBN app to analyze. Currently available: 'keygen', 'modinv'
+  app: keygen
+  # For app = keygen: There are two fixed-vs-random test types, KEY and SEED
+  # Currently batch-mode capture only works with SEED
+  test_type: KEY
+  batch_mode: True
diff --git a/capture/configs/otbn_vertical_keygen_sca_cw310.yaml b/capture/configs/otbn_vertical_keygen_sca_cw310.yaml
@@ -2,30 +2,31 @@ target:
   target_type: cw310
   fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
   force_program_bitstream: True
-  fw_bin: "../objs/otbn_vertical_serial_fpga_cw310.bin"
+  # fw_bin: "../objs/otbn_vertical_serial_fpga_cw310.bin"
+  fw_bin: ../objs/sca_ujson_fpga_cw310.bin
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.
   target_clk_mult: 0.24
   target_freq: 24000000
   baudrate: 115200
   output_len_bytes: 40
-  protocol: "simpleserial"
-  # protocol: "ujson"
-  # port: "/dev/ttyACM4"
+  # protocol: "simpleserial"
+  protocol: "ujson"
+  port: "/dev/ttyACM4"
   # Trigger source.
   # hw: Precise, hardware-generated trigger - FPGA only.
   # sw: Fully software-controlled trigger.
   trigger: "hw"
 husky:
   sampling_rate: 200000000
-  num_segments: 20
+  num_segments: 1
   num_cycles: 200
   offset_cycles: 0
   scope_gain: 24
   adc_mul: 1
   decimate: 1
 waverunner:
   waverunner_ip: 100.107.71.10
-  num_segments: 20
+  num_segments: 1
   num_samples: 6000
   sample_offset: 0
 capture:

diff --git a/ci/cfg/ci_otbn_sca_vertical_keygen_cw310_simpleserial.yaml b/ci/cfg/ci_otbn_sca_vertical_keygen_cw310_simpleserial.yaml
@@ -0,0 +1,44 @@
+target:
+  target_type: cw310
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  force_program_bitstream: False
+  fw_bin: "../objs/otbn_vertical_serial_fpga_cw310.bin"
+  # target_clk_mult is a hardcoded value in the bitstream. Do not change.
+  target_clk_mult: 0.24
+  target_freq: 24000000
+  baudrate: 115200
+  output_len_bytes: 40
+  protocol: "simpleserial"
+  # Trigger source.
+  # hw: Precise, hardware-generated trigger - FPGA only.
+  # sw: Fully software-controlled trigger.
+  trigger: "hw"
+husky:
+  sampling_rate: 200000000
+  num_segments: 1
+  num_cycles: 200
+  offset_cycles: 0
+  scope_gain: 24
+  adc_mul: 1
+  decimate: 1
+capture:
+  scope_select: husky
+  show_plot: True
+  plot_traces: 10
+  num_traces: 100
+  trace_threshold: 10000
+  trace_db: ot_trace_library
+test:
+  batch_prng_seed: 6
+  key_len_bytes: 40
+  text_len_bytes: 40
+  plain_text_len_bytes: 40
+  masks_off: False
+  # Currently, 'p256' is the only supported curve.
+  curve: p256
+  # Select the OTBN app to analyze. Currently available: 'keygen', 'modinv'
+  app: keygen
+  # For app = keygen: There are two fixed-vs-random test types, KEY and SEED
+  # Currently batch-mode capture only works with SEED
+  test_type: SEED
+  batch_mode: False
diff --git a/ci/cfg/ci_otbn_sca_vertical_keygen_cw310_ujson.yaml b/ci/cfg/ci_otbn_sca_vertical_keygen_cw310_ujson.yaml
@@ -0,0 +1,45 @@
+target:
+  target_type: cw310
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  force_program_bitstream: False
+  fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  # target_clk_mult is a hardcoded value in the bitstream. Do not change.
+  target_clk_mult: 0.24
+  target_freq: 24000000
+  baudrate: 115200
+  output_len_bytes: 40
+  protocol: "ujson"
+  port: "/dev/ttyACM_CW310_1"
+  # Trigger source.
+  # hw: Precise, hardware-generated trigger - FPGA only.
+  # sw: Fully software-controlled trigger.
+  trigger: "hw"
+husky:
+  sampling_rate: 200000000
+  num_segments: 1
+  num_cycles: 200
+  offset_cycles: 0
+  scope_gain: 24
+  adc_mul: 1
+  decimate: 1
+capture:
+  scope_select: husky
+  show_plot: True
+  plot_traces: 10
+  num_traces: 100
+  trace_threshold: 10000
+  trace_db: ot_trace_library
+test:
+  batch_prng_seed: 6
+  key_len_bytes: 40
+  text_len_bytes: 40
+  plain_text_len_bytes: 40
+  masks_off: False
+  # Currently, 'p256' is the only supported curve.
+  curve: p256
+  # Select the OTBN app to analyze. Currently available: 'keygen', 'modinv'
+  app: keygen
+  # For app = keygen: There are two fixed-vs-random test types, KEY and SEED
+  # Currently batch-mode capture only works with SEED
+  test_type: SEED
+  batch_mode: False
diff --git a/...nfigs/otbn_vertical_modinv_sca_cw310.yaml → ...a_vertical_modinv_cw310_simpleserial.yaml b/...nfigs/otbn_vertical_modinv_sca_cw310.yaml → ...a_vertical_modinv_cw310_simpleserial.yaml
@@ -1,20 +1,18 @@
 target:
   target_type: cw310
   fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
-  force_program_bitstream: True
+  force_program_bitstream: False
   fw_bin: "../objs/otbn_vertical_serial_fpga_cw310.bin"
   # target_clk_mult is a hardcoded value in the bitstream. Do not change.
   target_clk_mult: 0.24
   target_freq: 24000000
   baudrate: 115200
   output_len_bytes: 40
   protocol: "simpleserial"
-  # protocol: "ujson"
-  # port: "/dev/ttyACM4"
   # Trigger source.
   # hw: Precise, hardware-generated trigger - FPGA only.
   # sw: Fully software-controlled trigger.
-  trigger: "hw"
+  trigger: "sw"
 husky:
   sampling_rate: 200000000
   num_segments: 20
@@ -23,16 +21,11 @@ husky:
   scope_gain: 24
   adc_mul: 1
   decimate: 1
-waverunner:
-  waverunner_ip: 100.107.71.10
-  num_segments: 20
-  num_samples: 6000
-  sample_offset: 0
 capture:
   scope_select: husky
   show_plot: True
-  plot_traces: 100
-  num_traces: 1000
+  plot_traces: 10
+  num_traces: 100
   trace_threshold: 10000
   trace_db: ot_trace_library
 test:

diff --git a/ci/cfg/ci_otbn_sca_vertical_modinv_cw310_ujson.yaml b/ci/cfg/ci_otbn_sca_vertical_modinv_cw310_ujson.yaml
@@ -0,0 +1,45 @@
+target:
+  target_type: cw310
+  fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
+  force_program_bitstream: False
+  fw_bin: ../objs/sca_ujson_fpga_cw310.bin
+  # target_clk_mult is a hardcoded value in the bitstream. Do not change.
+  target_clk_mult: 0.24
+  target_freq: 24000000
+  baudrate: 115200
+  output_len_bytes: 40
+  protocol: "ujson"
+  port: "/dev/ttyACM_CW310_1"
+  # Trigger source.
+  # hw: Precise, hardware-generated trigger - FPGA only.
+  # sw: Fully software-controlled trigger.
+  trigger: "sw"
+husky:
+  sampling_rate: 200000000
+  num_segments: 20
+  num_cycles: 1000
+  offset_cycles: 0
+  scope_gain: 24
+  adc_mul: 1
+  decimate: 1
+capture:
+  scope_select: husky
+  show_plot: True
+  plot_traces: 10
+  num_traces: 100
+  trace_threshold: 10000
+  trace_db: ot_trace_library
+test:
+  batch_prng_seed: 6
+  key_len_bytes: 40
+  text_len_bytes: 40
+  plain_text_len_bytes: 40
+  masks_off: False
+  # Currently, 'p256' is the only supported curve.
+  curve: p256
+  # Select the OTBN app to analyze. Currently available: 'keygen', 'modinv'
+  app: modinv
+  # For app = keygen: There are two fixed-vs-random test types, KEY and SEED
+  # Currently batch-mode capture only works with SEED
+  test_type: SEED
+  batch_mode: False
diff --git a/objs/sca_ujson_fpga_cw310.bin b/objs/sca_ujson_fpga_cw310.bin