Fix MMIO Addressing and Attributes on Non-Master Proc

- MMIOs to the MC/OMI space to a non-master proc were incorrectly using a base address pointing to proc0 - The OMI_INBAND_BAR_BASE_ADDR_OFFSET attribute MRW processing was incorrect for MC and OMI targets behind the 2nd proc Change-Id: Ife440541642463e11d4146157d568f8cd4440877 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82234 Tested-by: Jenkins Server <[email protected]> Tested-by: Jenkins OP Build CI <[email protected]> Reviewed-by: Christian R Geddes <[email protected]> Tested-by: Jenkins OP HW <[email protected]> Tested-by: FSP CI Jenkins <[email protected]> Reviewed-by: Michael Baiocchi <[email protected]> Reviewed-by: Daniel M Crowell <[email protected]>
open-power · Aug 16, 2019 · 5825828 · 5825828
1 parent 51b7478
commit 5825828
Show file tree

Hide file tree

Showing 2 changed files with 17 additions and 6 deletions.
diff --git a/src/usr/mmio/mmio.C b/src/usr/mmio/mmio.C
@@ -108,8 +108,19 @@ errlHndl_t mmioSetup()
             auto l_omiBaseAddr =
                   l_mcTarget->getAttr<ATTR_OMI_INBAND_BAR_BASE_ADDR_OFFSET>();
 
-            // Apply the MMIO base offset so we get the real address
-            uint64_t  l_realAddr = ( l_omiBaseAddr | MMIO_BASE );
+            // Build up the full address with group/chip address considerations
+            auto l_procType = TARGETING::TYPE_PROC;
+            TARGETING::Target* l_parentChip = getParent(l_mcTarget, l_procType);
+            uint8_t l_groupId =
+                   l_parentChip->getAttr<ATTR_PROC_EFF_FABRIC_GROUP_ID>();
+            uint8_t l_chipId  =
+                   l_parentChip->getAttr<ATTR_PROC_EFF_FABRIC_CHIP_ID>();
+            uint64_t  l_realAddr = computeMemoryMapOffset( MMIO_BASE,
+                                                           l_groupId,
+                                                           l_chipId );
+
+            //  Apply the MMIO base offset so we get the final address
+            l_realAddr += l_omiBaseAddr;
 
             // Map the device with a kernal call, each device, the MC,  is 32 GB
             uint64_t l_virtAddr = reinterpret_cast<uint64_t>

diff --git a/src/usr/targeting/common/processMrw.pl b/src/usr/targeting/common/processMrw.pl
@@ -1662,9 +1662,9 @@ sub processMcbist
 ##
 sub processMc
 {
-    # TODO, work needs to be done for OMI_INBAND_BAR_BASE_ADDR_OFFSET
-    # Will be added in a later commit along with the other BARs
-    # RTC:210315
+    # NOTE: OMI_INBAND_BAR_BASE_ADDR_OFFSET will be set for the MC
+    # targets via a specific child OMI Target. View the
+    # processOmi function for further details.
     my $targetObj    = shift;
     my $target       = shift;
 
@@ -1765,7 +1765,7 @@ sub processOmi
     $value = "physical:sys-0/node-0/proc-$proc_num/" . $omi_map{$num};
     $targetObj->setAttribute($target, "OMIC_PARENT", $value);
 
-    my $omi = Math::BigInt->new($targetObj->getAttribute($target,"FAPI_POS"));
+    my $omi = Math::BigInt->new($targetObj->getAttribute($target,"CHIP_UNIT"));
     # Base omi bar offset
     # We use this base address in simics_AXONE.system.xml and want our
     # addresses to match the ones in that xml