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Bit of an explanation on this line. #181

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hanetzer opened this issue Aug 19, 2019 · 7 comments
Open

Bit of an explanation on this line. #181

hanetzer opened this issue Aug 19, 2019 · 7 comments

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@hanetzer
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;// Clear MSR[TA] (bit 1)

So, this line says it clears MSR[TA] (bit 1) but Power ISA Version 3.0 B pg. 943 states that
bits 1-2 of the MSR are 'reserved', and there is no bit I can see called TA. I was hoping
someone could elaborate on this, or let me know I'm interpreting it wrong.

@npiggin
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npiggin commented Aug 19, 2019

You are reading the ISA correctly, these MSR bits are reserved.
It predates my involvement with OpenPOWER but the code or comment may have inadvertently come from some legacy code base or documentation.

@dcrowell77
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Remember that the Power ISA AS permits implementation-specific extensions to the architecture. At this point I can only tell you that bit 1 does need to be zero for Hostboot and OPAL.

@dcrowell77
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@friedkiwi
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@hanetzer see https://archive.midrange.com/mi400/200502/msg00004.html for a good starting point. You might want to plow through that mailing list archive if you want to know more about tags active mode.

@hlandau
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hlandau commented Aug 31, 2019

@hanetzer
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@hanetzer see https://archive.midrange.com/mi400/200502/msg00004.html for a good starting
point. You might want to plow through that mailing list archive if you want to know more about
tags active mode.

Will do, thanks.

@hanetzer See here: https://www.devever.net/~hl/ppcas

Thankya, I actually have this open in a tab at my home workstation.

@friedkiwi
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@hanetzer: if you want to play with IBM i you can always pop into ##ibmi on freenode or on r/IBMiHUG. There’s a few semi-public machines people operate.

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