UCT/IB: Use relaxed ordering for Intel Emerald Rapids CPUs#10955
Merged
brminich merged 2 commits intoopenucx:masterfrom Jan 9, 2026
Merged
UCT/IB: Use relaxed ordering for Intel Emerald Rapids CPUs#10955brminich merged 2 commits intoopenucx:masterfrom
brminich merged 2 commits intoopenucx:masterfrom
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iyastreb
previously approved these changes
Oct 17, 2025
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/azp run UCX PR |
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Azure Pipelines successfully started running 1 pipeline(s). |
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brminich
approved these changes
Jan 9, 2026
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What?
Register memory with relaxed ordering flag on Intel Emerald Rapids.
Why?
Without
IBV_ACCESS_RELAXED_ORDERING, traffic can take different PCIe path with BW ~16GB/s instead of >40GB/s.Workaround without this PR:
UCX_IB_PCI_RELAXED_ORDERING=yCheck CPU:
ucx_info -s | grep CPUInternal: 5572179