Rel v1.16.3.1 #58
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Bump default from 8 to 64 blocks. Using 8 by default leads to requests being splitted on qemu, which slows down boot. Some (temporary) debug logging added showed that almost all requests on a standard fedora install are less than 64 blocks, so that should bring us back to 1.15 performance levels. Signed-off-by: Gerd Hoffmann <[email protected]>
When using spdk aio bdev driver, the qemu command line like this:
qemu-system-x86_64 \
-chardev socket,id=char0,path=/tmp/vhost.0 \
-device vhost-user-blk-pci,id=blk0,chardev=char0 \
...
Boot failure message as below:
e820 map has 7 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 000000007ffdd000 = 1 RAM
4: 000000007ffdd000 - 0000000080000000 = 2 RESERVED
5: 00000000feffc000 - 00000000ff000000 = 2 RESERVED
6: 00000000fffc0000 - 0000000100000000 = 2 RESERVED
enter handle_19:
NULL
Booting from Hard Disk...
Boot failed: could not read the boot disk
Fixes: a05af29 ("virtio-blk: split large IO according to size_max")
Acked-by: Andy Pei <[email protected]>
Acked-by: Gerd Hoffmann <[email protected]>
Acked-by: Michael S. Tsirkin <[email protected]>
Acked-by: Paul Menzel <[email protected]>
Signed-off-by: Xiaofei Lee <[email protected]>
Since QEMU commit 47a373faa6 (acpi: pc/q35: drop ad-hoc PCI-ISA bridge AML routines and let bus ennumeration generate AML) SeaBIOS fails to parse ISA bridge AML with: parse_termlist: parse error, skip from 92/517 ... ACPI: no PS/2 keyboard present due to Alias term in DSDT which isn't handled by SeaBIOS properly. Add dumb Alias parsing which just skips over term, so the rest of AML could be parsed successfully. Signed-off-by: Igor Mammedov <[email protected]> Reported-by: Volker Rümelin <[email protected]> Message-Id: <[email protected]> Signed-off-by: Gerd Hoffmann <[email protected]>
Under mmio, when we read the feature from the device, we should read the high 32-bit part. Similarly, when writing the feature back, we should also write back the high 32-bit feature. Signed-off-by: Xuan Zhuo <[email protected]> Acked-by: Michael S. Tsirkin <[email protected]> Message-Id: <[email protected]> Signed-off-by: Gerd Hoffmann <[email protected]>
Under the standard of Virtio 1.0, the initialization process of the device must first write sub-features back to device before using device, such as finding vqs. There are four places using vp_find_vq(). 1. virtio-blk.pci: put the code of finalizing features in front of using device 2. virtio-blk.mmio: put the code of finalizing features in front of using device 3. virtio-scsi.pci: is ok 4. virtio-scsi.mmio: add the code of finalizing features before vp_find_vq() Link: https://www.mail-archive.com/[email protected]/msg920776.html Signed-off-by: Xuan Zhuo <[email protected]> Acked-by: Michael S. Tsirkin <[email protected]> Message-Id: <[email protected]> Signed-off-by: Gerd Hoffmann <[email protected]>
…t protocol There is always some endpoint descriptors after each interface descriptor, We should only decrement num_iface if interface type is USB_DT_INTERFACE, see https://www.beyondlogic.org/usbnutshell/usb5.shtml#ConfigurationDescriptors Signed-off-by: Qi Zhou <[email protected]>
When running under Xen, hvmloader places a table at 0x1000 with the e820 information and BIOS tables. If this isn't present, SeaBIOS will currently panic. We now have support for running Xen guests natively in QEMU/KVM, which boots SeaBIOS directly instead of via hvmloader, and does not provide the same structure. As it happens, this doesn't matter on first boot. because although we set PlatformRunningOn to PF_QEMU|PF_XEN, reading it back again still gives zero. Presumably because in true Xen, this is all already RAM. But in QEMU with a faithfully-emulated PAM config in the host bridge, it's still in ROM mode at this point so we don't see what we've just written. On reboot, however, the region *is* set to RAM mode and we do see the updated value of PlatformRunningOn, do manage to remember that we've detected Xen in CPUID, and hit the panic. It's not trivial to detect QEMU vs. real Xen at the time xen_preinit() runs, because it's so early. We can't even make a XENVER_extraversion hypercall to look for hints, because we haven't set up the hypercall page (and don't have an allocator to give us a page in which to do so). So just make Xen detection contingent on the info structure being present. If it wasn't, we were going to panic anyway. That leaves us taking the standard QEMU init path for Xen guests in native QEMU, which is just fine. Untested on actual Xen but ObviouslyCorrect™. Signed-off-by: David Woodhouse <[email protected]>
The segmented pointer casting magic confuses gcc, recent versions throw array bound warnings. Disable the warning. Signed-off-by: Gerd Hoffmann <[email protected]>
malloc_high() cannot allocate any memory in CSM mode due to an empty ZoneHigh. SeaBIOS cannot find any disk to boot from because device initialization fails. The bug was introduced in 1.16.1 (commit dc88f9b) when the meaning of BUILD_MAX_HIGHTABLE changed but CSM code was not updated. This patch reverts to the previous behavior by using BUILD_MIN_HIGHTABLE in CSM methods. Signed-off-by: José Martínez <[email protected]>
When the maximum IO size supported by the virtio-blk backend is large enough (>= 32MiB for 512B sectors), the computed blk_num_max will overflow. In particular, if it's a multiple of 32MiB, blk_num_max will end up as zero, causing IO requests to fail. This is triggered by e.g. the SPDK virtio-blk vhost-user backend. To fix it, just limit blk_num_max to 65535 before converting to u16. Signed-off-by: Lukas Stockner <[email protected]>
According to AHCI 1.3.1, 5.3.8.1 RegFIS:Entry, if ERR_STAT is set in the received FIS, the HBA shall jump to state ERR:FatalTaskfile, which will raise a TFES IRQ. This means that if ERR_STAT is set in the recevied FIS, PxIS.TFES will be set, without either PxIS.DHRS or PxIS.PSS being set. SeaBIOS function ahci_port_setup() will try to identify an AHCI device by sending an ATAPI identify device command. However, such a command will be aborted with ERR_STAT set for a regular (non-ATAPI) device. ahci_command() already performs the correct error recovery steps when status is correctly set, so simply modify ahci_command() to read the correct status when PxIS.TFES is set. It is safe to read PxTFD when PxIS.TFES is set, even for systems with a port multiplier, see AHCI 1.3.1, 9.3.7 PxTFD Register Information: "When a taskfile error occurs (PxIS.TFES is set to '1'), the host may refer to the values in PxTFD. The values in PxTFD at this time are guaranteed to correspond to the device that reported the taskfile error condition." Without this, each boot will be delayed by 32 seconds, waiting for the AHCI command to timeout. Signed-off-by: Niklas Cassel <[email protected]> Tested-by: Gerd Hoffmann <[email protected]> Acked-by: Gerd Hoffmann <[email protected]>
For platforms with high number of numa nodes, 32 e820 entries are not enough. Linux kernel sets the maximum e820 entries to a base value of 128. Setting BUILD_MAX_E820 to 128 to be in sync with this base value. Signed-off-by: Tony Titus <[email protected]> Message-ID: <[email protected]> Signed-off-by: Gerd Hoffmann <[email protected]>
The ESP FIFO is used as a buffer for DMA requests and so isn't guaranteed to be empty in the case of SCSI errors or a mixed DMA/non-DMA request. Flush the FIFO before sending a SCSI command to guarantee that it is correctly positioned at the start of the FIFO. Signed-off-by: Mark Cave-Ayland <[email protected]> Reviewed-by: Paolo Bonzini <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Message-ID: <[email protected]> Signed-off-by: Gerd Hoffmann <[email protected]>
…mpletion
The ESP SELATN command used to send SCSI commands from the ESP to the SCSI bus
is not a DMA command and therefore does not affect the STAT_TC bit. The only
reason this works at all is due to a bug in QEMU which (currently) always
updates the STAT_TC bit in ESP_RSTAT regardless of the state of the ESP_CMD_DMA
bit.
According to the NCR datasheet [1] the INTR_BS/INTR_FC bits are set when the
SELATN command has completed, so update the existing logic to check for these
bits in ESP_RINTR instead. Note that the read of ESP_RINTR needs to be
restricted to state == 0 as reading ESP_RINTR resets the ESP_RSTAT register
which breaks the STAT_TC check when state == 1.
This commit also includes an extra read of ESP_INTR to clear all the interrupt
bits before submitting the SELATN command to ensure that we don't accidentally
immediately progress to the data phase handling logic where ESP_RINTR bits have
already been set by a previous ESP command.
[1] "NCR 53C94, 53C95, 53C96 Advanced SCSI Controller"
NCR_53C94_53C95_53C96_Data_Sheet_Feb90.pdf
Signed-off-by: Mark Cave-Ayland <[email protected]>
Reviewed-by: Paolo Bonzini <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Gerd Hoffmann <[email protected]>
The existing esp-scsi state machine checks for the STAT_TC bit to exit state 1 but in the case where there is no data phase, a non-DMA command is executed which doesn't set STAT_TC. This only works because QEMU currently always sets STAT_TC just after issuing every SCSI command. Update the esp-scsi state machine so that in the case where there is no data phase, we immediately execute CMD_ICCS instead of waiting for STAT_TC to be set which will never happen with a non-DMA CMD_SELATN command. Signed-off-by: Mark Cave-Ayland <[email protected]> Message-ID: <[email protected]> Signed-off-by: Gerd Hoffmann <[email protected]>
In case kvm emulates features of another hypervisor (for example hyperv) two VMM CPUID blocks will be present, one for the emulated hypervisor and one for kvm itself. This patch makes seabios loop over the VMM CPUID blocks to make sure it will properly detect kvm when multiple blocks are present. Signed-off-by: Gerd Hoffmann <[email protected]>
Check for pae and long mode using cpuid. If present also read the
physical address bits. Apply some qemu sanity checks (see below).
Record results in PhysBits and LongMode variables. In case we are not
sure what the address space size is leave the PhysBits variable unset.
On qemu we have the problem that for historical reasons x86_64
processors advertise 40 physical address space bits by default, even in
case the host supports less than that so actually using the whole
address space will not work.
Because of that the code applies some extra sanity checks in case we
find 40 (or less) physical address space bits advertised. Only
known-good values (which is 40 for amd processors and 36+39 for intel
processors) will be accepted as valid.
Recommendation is to use 'qemu -cpu ${name},host-phys-bits=on' to
advertise valid physical address space bits to the guest. Some distro
builds enable this by default, and most likely the qemu default will
change in near future too.
Signed-off-by: Gerd Hoffmann <[email protected]>
When the size of the physical address space is known (PhysBits is not zero) move the 64bit pci io window to the end of the address space. Signed-off-by: Gerd Hoffmann <[email protected]>
Current seabios code will only enable and use the 64bit pci io window in case it runs out of space in the 32bit pci mmio window below 4G. This patch will also enable the 64bit pci io window when (a) RAM above 4G is present, and (b) the physical address space size is known, and (c) seabios is running on a 64bit capable processor. This operates with the assumption that guests which are ok with memory above 4G most likely can handle mmio above 4G too. In case the 64bit pci io window is enabled also assign more memory to prefetchable pci bridge windows and the complete 64bit pci io window. The total mmio window size is 1/8 of the physical address space. Minimum bridge windows size is 1/256 of the total mmio window size. Signed-off-by: Gerd Hoffmann <[email protected]>
With loglevel 1 (same we use for RAM entries), so it is included in the firmware log by default. Signed-off-by: Gerd Hoffmann <[email protected]>
Add support to check for overlaps with e820 entries. In case the 64bit pci io window has conflicts move it down. The only known case where this happens is AMD processors with 1TB address space which has some space just below 1TB reserved for HT. Signed-off-by: Gerd Hoffmann <[email protected]>
For better compatibility with old linux kernels, see source code comment. Also rename some variables to make the code more readable, following suggestions by Kevin. Related (same problem in ovmf): tianocore/edk2@c1e853769046 Cc: Kevin O'Connor <[email protected]> Reported-by: Claudio Fontana <[email protected]> Signed-off-by: Gerd Hoffmann <[email protected]>
7 tasks
…toolchain version Signed-off-by: Piotr Król <[email protected]>
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