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drm/panel: mingjun: use gpiod_set_value_cansleep#28

Merged
RevySR merged 1 commit intorevyos:th1520-ltsfrom
Icenowy:th1520-6.6-lcon4a-panel-warn-fix
Jul 15, 2025
Merged

drm/panel: mingjun: use gpiod_set_value_cansleep#28
RevySR merged 1 commit intorevyos:th1520-ltsfrom
Icenowy:th1520-6.6-lcon4a-panel-warn-fix

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@Icenowy Icenowy commented Jul 14, 2025

For power sequencing that do not require strict timing, gpiod_set_value_cansleep is usually used.

Do the same thing on the mingjun panel driver.

This fixes some warnings on Lichee Console 4A.

Summary by Sourcery

Bug Fixes:

  • Replace reset GPIO toggles with gpiod_set_value_cansleep to fix warnings on platforms requiring can-sleep GPIO calls

For power sequencing that do not require strict timing,
gpiod_set_value_cansleep is usually used.

Do the same thing on the mingjun panel driver.

This fixes some warnings on Lichee Console 4A.

Signed-off-by: Icenowy Zheng <[email protected]>
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sourcery-ai bot commented Jul 14, 2025

Reviewer's Guide

Refactor the mingjun panel driver to replace direct GPIO toggles with the sleep-capable API for reset control, ensuring correct context usage and silencing warnings on Lichee Console 4A.

Class diagram for mingjun panel driver GPIO usage update

classDiagram
    class mingjun_panel_info {
        +struct gpio_desc *reset
        +struct regulator *hsvcc
        +struct regulator *vspn3v3
        +bool prepared
    }
    class mingjun_panel_driver {
        +int mingjun_prepare(struct drm_panel *panel)
        +int mingjun_unprepare(struct drm_panel *panel)
    }
    mingjun_panel_driver --> mingjun_panel_info : uses
    mingjun_panel_driver : - gpiod_set_value(pinfo->reset, X)
    mingjun_panel_driver : + gpiod_set_value_cansleep(pinfo->reset, X)
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File-Level Changes

Change Details Files
Use gpiod_set_value_cansleep for reset GPIO instead of gpiod_set_value
  • Replace reset toggle in unprepare sequence
  • Replace initial reset deassert in prepare
  • Replace reset assert after power-on delay
  • Replace reset assert in failure cleanup
drivers/gpu/drm/panel/panel-mingjun-070bi30ia2.c

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@Icenowy Icenowy requested a review from nekorouter July 14, 2025 20:03
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Hey @Icenowy - I've reviewed your changes and they look great!


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@RevySR RevySR merged commit 8a8840f into revyos:th1520-lts Jul 15, 2025
1 check passed
RevySR pushed a commit that referenced this pull request Feb 15, 2026
commit b4d37cd upstream.

When deassigning a KVM_IRQFD, don't clobber the irqfd's copy of the IRQ's
routing entry as doing so breaks kvm_arch_irq_bypass_del_producer() on x86
and arm64, which explicitly look for KVM_IRQ_ROUTING_MSI.  Instead, to
handle a concurrent routing update, verify that the irqfd is still active
before consuming the routing information.  As evidenced by the x86 and
arm64 bugs, and another bug in kvm_arch_update_irqfd_routing() (see below),
clobbering the entry type without notifying arch code is surprising and
error prone.

As a bonus, checking that the irqfd is active provides a convenient
location for documenting _why_ KVM must not consume the routing entry for
an irqfd that is in the process of being deassigned: once the irqfd is
deleted from the list (which happens *before* the eventfd is detached), it
will no longer receive updates via kvm_irq_routing_update(), and so KVM
could deliver an event using stale routing information (relative to
KVM_SET_GSI_ROUTING returning to userspace).

As an even better bonus, explicitly checking for the irqfd being active
fixes a similar bug to the one the clobbering is trying to prevent: if an
irqfd is deactivated, and then its routing is changed,
kvm_irq_routing_update() won't invoke kvm_arch_update_irqfd_routing()
(because the irqfd isn't in the list).  And so if the irqfd is in bypass
mode, IRQs will continue to be posted using the old routing information.

As for kvm_arch_irq_bypass_del_producer(), clobbering the routing type
results in KVM incorrectly keeping the IRQ in bypass mode, which is
especially problematic on AMD as KVM tracks IRQs that are being posted to
a vCPU in a list whose lifetime is tied to the irqfd.

Without the help of KASAN to detect use-after-free, the most common
sympton on AMD is a NULL pointer deref in amd_iommu_update_ga() due to
the memory for irqfd structure being re-allocated and zeroed, resulting
in irqfd->irq_bypass_data being NULL when read by
avic_update_iommu_vcpu_affinity():

  BUG: kernel NULL pointer dereference, address: 0000000000000018
  #PF: supervisor read access in kernel mode
  #PF: error_code(0x0000) - not-present page
  PGD 40cf2b9067 P4D 40cf2b9067 PUD 408362a067 PMD 0
  Oops: Oops: 0000 [#1] SMP
  CPU: 6 UID: 0 PID: 40383 Comm: vfio_irq_test
  Tainted: G     U  W  O        6.19.0-smp--5dddc257e6b2-irqfd #31 NONE
  Tainted: [U]=USER, [W]=WARN, [O]=OOT_MODULE
  Hardware name: Google, Inc. Arcadia_IT_80/Arcadia_IT_80, BIOS 34.78.2-0 09/05/2025
  RIP: 0010:amd_iommu_update_ga+0x19/0xe0
  Call Trace:
   <TASK>
   avic_update_iommu_vcpu_affinity+0x3d/0x90 [kvm_amd]
   __avic_vcpu_load+0xf4/0x130 [kvm_amd]
   kvm_arch_vcpu_load+0x89/0x210 [kvm]
   vcpu_load+0x30/0x40 [kvm]
   kvm_arch_vcpu_ioctl_run+0x45/0x620 [kvm]
   kvm_vcpu_ioctl+0x571/0x6a0 [kvm]
   __se_sys_ioctl+0x6d/0xb0
   do_syscall_64+0x6f/0x9d0
   entry_SYSCALL_64_after_hwframe+0x4b/0x53
  RIP: 0033:0x46893b
    </TASK>
  ---[ end trace 0000000000000000 ]---

If AVIC is inhibited when the irfd is deassigned, the bug will manifest as
list corruption, e.g. on the next irqfd assignment.

  list_add corruption. next->prev should be prev (ffff8d474d5cd588),
                       but was 0000000000000000. (next=ffff8d8658f86530).
  ------------[ cut here ]------------
  kernel BUG at lib/list_debug.c:31!
  Oops: invalid opcode: 0000 [#1] SMP
  CPU: 128 UID: 0 PID: 80818 Comm: vfio_irq_test
  Tainted: G     U  W  O        6.19.0-smp--f19dc4d680ba-irqfd #28 NONE
  Tainted: [U]=USER, [W]=WARN, [O]=OOT_MODULE
  Hardware name: Google, Inc. Arcadia_IT_80/Arcadia_IT_80, BIOS 34.78.2-0 09/05/2025
  RIP: 0010:__list_add_valid_or_report+0x97/0xc0
  Call Trace:
   <TASK>
   avic_pi_update_irte+0x28e/0x2b0 [kvm_amd]
   kvm_pi_update_irte+0xbf/0x190 [kvm]
   kvm_arch_irq_bypass_add_producer+0x72/0x90 [kvm]
   irq_bypass_register_consumer+0xcd/0x170 [irqbypass]
   kvm_irqfd+0x4c6/0x540 [kvm]
   kvm_vm_ioctl+0x118/0x5d0 [kvm]
   __se_sys_ioctl+0x6d/0xb0
   do_syscall_64+0x6f/0x9d0
   entry_SYSCALL_64_after_hwframe+0x4b/0x53
   </TASK>
  ---[ end trace 0000000000000000 ]---

On Intel and arm64, the bug is less noisy, as the end result is that the
device keeps posting IRQs to the vCPU even after it's been deassigned.

Note, the worst of the breakage can be traced back to commit cb21073
("KVM: Pass new routing entries and irqfd when updating IRTEs"), as before
that commit KVM would pull the routing information from the per-VM routing
table.  But as above, similar bugs have existed since support for IRQ
bypass was added.  E.g. if a routing change finished before irq_shutdown()
invoked kvm_arch_irq_bypass_del_producer(), VMX and SVM would see stale
routing information and potentially leave the irqfd in bypass mode.

Alternatively, x86 could be fixed by explicitly checking irq_bypass_vcpu
instead of irq_entry.type in kvm_arch_irq_bypass_del_producer(), and arm64
could be modified to utilize irq_bypass_vcpu in a similar manner.  But (a)
that wouldn't fix the routing updates bug, and (b) fixing core code doesn't
preclude x86 (or arm64) from adding such code as a sanity check (spoiler
alert).

Fixes: f70c20a ("KVM: Add an arch specific hooks in 'struct kvm_kernel_irqfd'")
Fixes: cb21073 ("KVM: Pass new routing entries and irqfd when updating IRTEs")
Fixes: a0d7e2f ("KVM: arm64: vgic-v4: Only attempt vLPI mapping for actual MSIs")
Cc: [email protected]
Cc: Marc Zyngier <[email protected]>
Cc: Oliver Upton <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Sean Christopherson <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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