Add rule for non-power-of-2 vector

riscv-cc.adoc

@@ -508,6 +508,25 @@ A fixed-length vector argument is passed in eight vector argument registers,
 similar to vector data arguments with LMUL=8, if the size of the vector is
 greater than 4×ABI_VLEN bit and less than or equal to 8×ABI_VLEN bit.
 
+[NOTE]
+===
+Fixed-length vectors that are not a power-of-2 in size will be rounded up to
+the next power-of-2 length for the purpose of register allocation and handling.
+For instance, a vector type like `int32x3_t` (which contains three 32-bit
+integers) will be treated as an `int32x4_t` (a 128-bit vector, as LMUL=1) in
+the ABI, and passed accordingly. This ensures consistency in how vectors are
+handled and simplifies the process of argument passing.
+
+Example: Consider an `int32x3_t` vector (three 32-bit integers):
+- The vector's total size is 96 bits, which is not a power of 2.
+- The ABI will round up the size to 128 bits (corresponding to `int32x4_t`),
+  meaning the vector will be passed using one vector argument register when
+  ABI_VLEN=128.
+
+This rule applies to all non-power-of-2 fixed-length vectors, ensuring they
+are treated consistently across different ABI_VLEN settings.
+===
+
 A fixed-length vector argument is passed by reference and is replaced in the
 argument list with the address if it is larger than 8×ABI_VLEN bit or if
 there is a shortage of vector argument registers.