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Issues: riscv/riscv-CMOs
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FOURTH QUESTION: How do we specify which parts of the memory/cache hierarchy are affected by CMOs ?
#12
opened Sep 2, 2020 by
AndyGlew
SECOND QUESTION: cache index CMOs, e.g. (set,way) vs "microarchitecture index range"
#10
opened Sep 2, 2020 by
AndyGlew
FIRST BIG QUESTION: Address Range vs per-Cache-Line CMO instructions
#9
opened Sep 2, 2020 by
AndyGlew
Don't assume cache line sizes are fixed during program execution
#8
opened Sep 1, 2020 by
brucehoult
ProTip!
What’s not been updated in a month: updated:<2024-10-08.