refactor(wafer): use uart::{Receive, Transmit} path to shorten use …

…code Signed-off-by: Zhouqi Jiang <[email protected]>
rustsbi · Jan 5, 2025 · 0b42c8e · 0b42c8e
1 parent f208a9e
commit 0b42c8e
Showing 1 changed file with 53 additions and 56 deletions.
diff --git a/allwinner-hal/src/wafer/d1.rs b/allwinner-hal/src/wafer/d1.rs
@@ -1,9 +1,6 @@
 //! SoC configuration on D1-like chips.
 
-use crate::{
-    smhc, spi,
-    uart::{Receive, Transmit},
-};
+use crate::{smhc, spi, uart};
 use core::num::NonZeroU32;
 
 impl_gpio_pins! {
@@ -99,58 +96,58 @@ impl_gpio_pins! {
 
 // UART PINS
 impl_pins_trait! {
-    ('B', 0, 6): Transmit<0>;
-    ('B', 0, 7): Transmit<2>;
-    ('B', 1, 6): Receive<0>;
-    ('B', 1, 7): Receive<2>;
-    ('B', 2, 7): Transmit<4>;
-    ('B', 3, 7): Receive<4>;
-    ('B', 4, 7): Transmit<5>;
-    ('B', 5, 7): Receive<5>;
-    ('B', 6, 7): Transmit<3>;
-    ('B', 7, 7): Receive<3>;
-    ('B', 8, 6): Transmit<0>;
-    ('B', 8, 7): Transmit<1>;
-    ('B', 9, 6): Receive<0>;
-    ('B', 9, 7): Receive<1>;
-    ('C', 0, 2): Transmit<2>;
-    ('C', 1, 2): Receive<2>;
-    ('C', 6, 4): Transmit<3>;
-    ('C', 7, 4): Receive<3>;
-    ('D', 1, 5): Transmit<2>;
-    ('D', 2, 5): Receive<2>;
-    ('D', 5, 5): Transmit<5>;
-    ('D', 6, 5): Receive<5>;
-    ('D', 7, 5): Transmit<4>;
-    ('D', 8, 5): Receive<4>;
-    ('D', 10, 5): Transmit<3>;
-    ('D', 11, 5): Receive<3>;
-    ('D', 21, 4): Transmit<1>;
-    ('D', 22, 4): Receive<1>;
-    ('E', 2, 3): Transmit<2>;
-    ('E', 2, 6): Transmit<0>;
-    ('E', 3, 3): Receive<2>;
-    ('E', 3, 6): Receive<0>;
-    ('E', 4, 3): Transmit<4>;
-    ('E', 5, 3): Receive<4>;
-    ('E', 6, 3): Transmit<5>;
-    ('E', 7, 3): Receive<5>;
-    ('E', 8, 5): Transmit<3>;
-    ('E', 9, 5): Receive<3>;
-    ('E', 10, 3): Transmit<1>;
-    ('E', 11, 3): Receive<1>;
-    ('G', 0, 3): Transmit<3>;
-    ('G', 1, 3): Receive<3>;
-    ('G', 2, 5): Transmit<4>;
-    ('G', 3, 5): Receive<4>;
-    ('G', 4, 3): Transmit<5>;
-    ('G', 5, 3): Receive<5>;
-    ('G', 6, 2): Transmit<1>;
-    ('G', 7, 2): Receive<1>;
-    ('G', 8, 5): Transmit<3>;
-    ('G', 9, 5): Receive<3>;
-    ('G', 17, 2): Transmit<2>;
-    ('G', 18, 2): Receive<2>;
+    ('B', 0, 6): uart::Transmit<0>;
+    ('B', 0, 7): uart::Transmit<2>;
+    ('B', 1, 6): uart::Receive<0>;
+    ('B', 1, 7): uart::Receive<2>;
+    ('B', 2, 7): uart::Transmit<4>;
+    ('B', 3, 7): uart::Receive<4>;
+    ('B', 4, 7): uart::Transmit<5>;
+    ('B', 5, 7): uart::Receive<5>;
+    ('B', 6, 7): uart::Transmit<3>;
+    ('B', 7, 7): uart::Receive<3>;
+    ('B', 8, 6): uart::Transmit<0>;
+    ('B', 8, 7): uart::Transmit<1>;
+    ('B', 9, 6): uart::Receive<0>;
+    ('B', 9, 7): uart::Receive<1>;
+    ('C', 0, 2): uart::Transmit<2>;
+    ('C', 1, 2): uart::Receive<2>;
+    ('C', 6, 4): uart::Transmit<3>;
+    ('C', 7, 4): uart::Receive<3>;
+    ('D', 1, 5): uart::Transmit<2>;
+    ('D', 2, 5): uart::Receive<2>;
+    ('D', 5, 5): uart::Transmit<5>;
+    ('D', 6, 5): uart::Receive<5>;
+    ('D', 7, 5): uart::Transmit<4>;
+    ('D', 8, 5): uart::Receive<4>;
+    ('D', 10, 5): uart::Transmit<3>;
+    ('D', 11, 5): uart::Receive<3>;
+    ('D', 21, 4): uart::Transmit<1>;
+    ('D', 22, 4): uart::Receive<1>;
+    ('E', 2, 3): uart::Transmit<2>;
+    ('E', 2, 6): uart::Transmit<0>;
+    ('E', 3, 3): uart::Receive<2>;
+    ('E', 3, 6): uart::Receive<0>;
+    ('E', 4, 3): uart::Transmit<4>;
+    ('E', 5, 3): uart::Receive<4>;
+    ('E', 6, 3): uart::Transmit<5>;
+    ('E', 7, 3): uart::Receive<5>;
+    ('E', 8, 5): uart::Transmit<3>;
+    ('E', 9, 5): uart::Receive<3>;
+    ('E', 10, 3): uart::Transmit<1>;
+    ('E', 11, 3): uart::Receive<1>;
+    ('G', 0, 3): uart::Transmit<3>;
+    ('G', 1, 3): uart::Receive<3>;
+    ('G', 2, 5): uart::Transmit<4>;
+    ('G', 3, 5): uart::Receive<4>;
+    ('G', 4, 3): uart::Transmit<5>;
+    ('G', 5, 3): uart::Receive<5>;
+    ('G', 6, 2): uart::Transmit<1>;
+    ('G', 7, 2): uart::Receive<1>;
+    ('G', 8, 5): uart::Transmit<3>;
+    ('G', 9, 5): uart::Receive<3>;
+    ('G', 17, 2): uart::Transmit<2>;
+    ('G', 18, 2): uart::Receive<2>;
 }
 
 // SPI PINS