refactor(rt): rearrange chip specific features to cluster specific

The `arch` module are now gated under microarchitecture specific features, not SoC cluster features.

Signed-off-by: Zhouqi Jiang <[email protected]>

Author: luojia65

allwinner-rt/Cargo.toml

@@ -30,11 +30,19 @@ riscv-target-parser = "0.1.3"
 
 [features]
 default = ["nezha", "panic-halt"]
-# D1-like chips: D1-H, D1s, F133.
-d1 = []
-v821 = []
+panic-halt = []
+
+# SoC hart cluster specific features.
+# D1-like chips: D1-H, D1s, F133. Only one cluster per chip.
+d1 = ["thead-c906"]
+# V821 chip. There are both CPU cluster and MCU cluster.
+v821-cpu = ["andes-a27l2"]
+v821-mcu = [] # TODO thead-e907
+
+# Microarchitecture specific features.
+andes-a27l2 = []
+thead-c906 = []
+thead-c907 = []
 
 nezha = []
 lichee = []
-
-panic-halt = []

allwinner-rt/src/arch/andes_a27l2.rs

@@ -2,7 +2,7 @@
 ///
 /// TODO Andes start code.
 #[cfg_attr(
-    any(all(feature = "v821", target_arch = "riscv64"), doc),
+    any(all(feature = "andes-a27l2", target_arch = "riscv64"), doc),
     unsafe(link_section = ".text.entry")
 )]
 #[unsafe(naked)]

allwinner-rt/src/arch/thead_c906.rs

@@ -7,7 +7,7 @@
 /// NOTE: `mxstatus` is a custom T-Head register. Do not confuse with `mstatus`.
 /// It allows for configuring special eXtensions. See further below for details.
 #[cfg_attr(
-    any(all(feature = "d1", target_arch = "riscv64"), doc),
+    any(all(feature = "thead-c906", target_arch = "riscv64"), doc),
     unsafe(link_section = ".text.entry")
 )]
 #[unsafe(naked)]

allwinner-rt/src/arch/thead_e907.rs

@@ -0,0 +1,4 @@
+//! T-Head E907 microarchitecture support.
+
+// TODO thead_e907_start
+// TODO thead_e907_halt

allwinner-rt/src/lib.rs

@@ -34,6 +34,7 @@ pub mod arch {
     pub mod riscv_fpu;
     pub mod thead_c906;
     pub mod thead_c907;
+    pub mod thead_e907;
 }
 
 pub mod soc {
@@ -55,7 +56,7 @@ cfg_if::cfg_if! {
             self::arch::thead_c906::{thead_c906_start as start, thead_c906_halt as halt},
             self::soc::d1::{__rom_init_params, Peripherals, Clocks},
         };
-    } else if #[cfg(feature = "v821")] {
+    } else if #[cfg(feature = "v821-cpu")] {
         pub use {
             self::arch::andes_a27l2::start,
             self::soc::v821::{__rom_init_params, Peripherals, Clocks},