State Machine G8 Graphic Accelerator

Register description

IOC Address map :
  0000-3fff - ROM

MEMC Address map (only low 2 bits decoded) :
  0 - high byte latch for G332
  4 - G332 write, register address in A13-A4
  8 - (read) status  (write) G332 write mirror (used only for writing BOOT register?)
    bit 0 - IRQ status, cleared by read from 0x18?
  c - ROM bank

Notes

Uses an INMOS G332 for display, connected to 512kb of VRAM.

Captures data from the VIDC external data port, and stores in VRAM, which is subsequently read by the G332. VIDC data capture uses supremacy bit in VIDC palette to mark display area. Data is inverted.

G8 and G16 are the same hardware with a different ROM

Links

Chris's Acorns: State Machine G8 Graphics Accelerator