degree > 1 main constraint sumcheck implementation #107 #108
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will merge and combine with #91 to review together |
kunxian-xia
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Aug 23, 2024
* optimize sumcheck algo circuit witness: direct witness on mle devirgo style on phase1_output * initial version for new zkVM design * riscv add prototype implementation * add new zkVM prover * new package ceno_zkvm * record witness generation * add transcript * add verifier * code cleanup * rename expression * prover record_r/record_w sumcheck * main sel sumcheck proof/verify * tower product witness inference * tower product sumcheck prove/verify * chores: fix tower sumcheck witness length error and clean up * verify record and zero expression * tower sumcheck prove/verify pass * WIP test main sel prove/verify * add benchmark * chores: interleaving with default value * main constraint sumcheck prove/verify pass * chores: mock witness * main constraint sumcheck verify final claim assertion pass * restructure ceno_zkvm package * refine expression format * wip lookup * lookup in logup implemetation with integration test pass * chores: code cosmetics * optimize with 2-stage sumcheck #103 * chores: refine virtual polys naming * fix proper ts and pc counting * try sumcheck bench * refine global state in riscv * degree > 1 main constraint sumcheck implementation #107 (#108) * monomial expression to virtual poly * degree > 1 sumcheck batched with main constraint * succint selector evaluation * refine succint selector evaluation formula and documentation * wip fix interleaving edge case * deal with interleaving_mles instance = 1 case * chores: code cosmetics and address review comments * fix logup padding with chip record challenge * riscv opcode type & combine add/sub opcode & dependency trim * ci whitelist ceno_zkvm lint/clippy * address review comments and naming cosmetics * remove unnessesary to_vec operation * tower verifier logup p(x) constant check * cleanup and hide thread-based logic * soundness fix: derive new sumcheck batched challenge for each round * fix sel evaluation point and add TODO check * fix sumcheck batched challenge deriving order * chore: rename pc step size & fine tune project structure * fix lint error
kunxian-xia
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Aug 23, 2024
* optimize sumcheck algo circuit witness: direct witness on mle devirgo style on phase1_output * temporarily exclude singer-pro from default workspace members * fux build error in mpcs * [Experiment] new zkVM design (#91) * optimize sumcheck algo circuit witness: direct witness on mle devirgo style on phase1_output * initial version for new zkVM design * riscv add prototype implementation * add new zkVM prover * new package ceno_zkvm * record witness generation * add transcript * add verifier * code cleanup * rename expression * prover record_r/record_w sumcheck * main sel sumcheck proof/verify * tower product witness inference * tower product sumcheck prove/verify * chores: fix tower sumcheck witness length error and clean up * verify record and zero expression * tower sumcheck prove/verify pass * WIP test main sel prove/verify * add benchmark * chores: interleaving with default value * main constraint sumcheck prove/verify pass * chores: mock witness * main constraint sumcheck verify final claim assertion pass * restructure ceno_zkvm package * refine expression format * wip lookup * lookup in logup implemetation with integration test pass * chores: code cosmetics * optimize with 2-stage sumcheck #103 * chores: refine virtual polys naming * fix proper ts and pc counting * try sumcheck bench * refine global state in riscv * degree > 1 main constraint sumcheck implementation #107 (#108) * monomial expression to virtual poly * degree > 1 sumcheck batched with main constraint * succint selector evaluation * refine succint selector evaluation formula and documentation * wip fix interleaving edge case * deal with interleaving_mles instance = 1 case * chores: code cosmetics and address review comments * fix logup padding with chip record challenge * riscv opcode type & combine add/sub opcode & dependency trim * ci whitelist ceno_zkvm lint/clippy * address review comments and naming cosmetics * remove unnessesary to_vec operation * tower verifier logup p(x) constant check * cleanup and hide thread-based logic * soundness fix: derive new sumcheck batched challenge for each round * fix sel evaluation point and add TODO check * fix sumcheck batched challenge deriving order * chore: rename pc step size & fine tune project structure * fix lint error
kunxian-xia
pushed a commit
that referenced
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Aug 27, 2024
* optimize sumcheck algo circuit witness: direct witness on mle devirgo style on phase1_output * initial version for new zkVM design * riscv add prototype implementation * add new zkVM prover * new package ceno_zkvm * record witness generation * add transcript * add verifier * code cleanup * rename expression * prover record_r/record_w sumcheck * main sel sumcheck proof/verify * tower product witness inference * tower product sumcheck prove/verify * chores: fix tower sumcheck witness length error and clean up * verify record and zero expression * tower sumcheck prove/verify pass * WIP test main sel prove/verify * add benchmark * chores: interleaving with default value * main constraint sumcheck prove/verify pass * chores: mock witness * main constraint sumcheck verify final claim assertion pass * restructure ceno_zkvm package * refine expression format * wip lookup * lookup in logup implemetation with integration test pass * chores: code cosmetics * optimize with 2-stage sumcheck #103 * chores: refine virtual polys naming * fix proper ts and pc counting * try sumcheck bench * refine global state in riscv * degree > 1 main constraint sumcheck implementation #107 (#108) * monomial expression to virtual poly * degree > 1 sumcheck batched with main constraint * succint selector evaluation * refine succint selector evaluation formula and documentation * wip fix interleaving edge case * deal with interleaving_mles instance = 1 case * chores: code cosmetics and address review comments * fix logup padding with chip record challenge * riscv opcode type & combine add/sub opcode & dependency trim * ci whitelist ceno_zkvm lint/clippy * address review comments and naming cosmetics * remove unnessesary to_vec operation * deal with interleaving_mles instance = 1 case * support add/mul * adding test cases for UInt::add * refactor add and adding add_const test cases * adding UInt::mul test cases and refine UInt.expr() * refine test cases * minor refinement * tower verifier logup p(x) constant check * cleanup and hide thread-based logic * support sub logic in addsub gadget * add range checks for witIns and address some review feedback * soundness fix: derive new sumcheck batched challenge for each round * fix sel evaluation point and add TODO check * fix sumcheck batched challenge deriving order * add overflow constraint and support expr -> witIn under mul operation * chore: rename pc step size & fine tune project structure * assert decomposed constant equals original value * remove IS_OVERFLOW flag * test: fix wit_in of the operation result in testing * add is_None check in create_carry_witin * add _unsafe version and some cleanup * remove computed_outcome as review feedback * remove zombie witnesses * generalize 0xFFFF * refactor range check function to assert_ux * fixing review feedback * fixing lint * move uint to upper layer to fix lint error * fix for review feedback, rename create_witin and refine comment * remove unnecessary range check --------- Co-authored-by: sm.wu <[email protected]>
hero78119
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Sep 30, 2024
* optimize sumcheck algo circuit witness: direct witness on mle devirgo style on phase1_output * temporarily exclude singer-pro from default workspace members * fux build error in mpcs * [Experiment] new zkVM design (#91) * optimize sumcheck algo circuit witness: direct witness on mle devirgo style on phase1_output * initial version for new zkVM design * riscv add prototype implementation * add new zkVM prover * new package ceno_zkvm * record witness generation * add transcript * add verifier * code cleanup * rename expression * prover record_r/record_w sumcheck * main sel sumcheck proof/verify * tower product witness inference * tower product sumcheck prove/verify * chores: fix tower sumcheck witness length error and clean up * verify record and zero expression * tower sumcheck prove/verify pass * WIP test main sel prove/verify * add benchmark * chores: interleaving with default value * main constraint sumcheck prove/verify pass * chores: mock witness * main constraint sumcheck verify final claim assertion pass * restructure ceno_zkvm package * refine expression format * wip lookup * lookup in logup implemetation with integration test pass * chores: code cosmetics * optimize with 2-stage sumcheck #103 * chores: refine virtual polys naming * fix proper ts and pc counting * try sumcheck bench * refine global state in riscv * degree > 1 main constraint sumcheck implementation #107 (#108) * monomial expression to virtual poly * degree > 1 sumcheck batched with main constraint * succint selector evaluation * refine succint selector evaluation formula and documentation * wip fix interleaving edge case * deal with interleaving_mles instance = 1 case * chores: code cosmetics and address review comments * fix logup padding with chip record challenge * riscv opcode type & combine add/sub opcode & dependency trim * ci whitelist ceno_zkvm lint/clippy * address review comments and naming cosmetics * remove unnessesary to_vec operation * tower verifier logup p(x) constant check * cleanup and hide thread-based logic * soundness fix: derive new sumcheck batched challenge for each round * fix sel evaluation point and add TODO check * fix sumcheck batched challenge deriving order * chore: rename pc step size & fine tune project structure * fix lint error
hero78119
added a commit
that referenced
this pull request
Sep 30, 2024
* optimize sumcheck algo circuit witness: direct witness on mle devirgo style on phase1_output * initial version for new zkVM design * riscv add prototype implementation * add new zkVM prover * new package ceno_zkvm * record witness generation * add transcript * add verifier * code cleanup * rename expression * prover record_r/record_w sumcheck * main sel sumcheck proof/verify * tower product witness inference * tower product sumcheck prove/verify * chores: fix tower sumcheck witness length error and clean up * verify record and zero expression * tower sumcheck prove/verify pass * WIP test main sel prove/verify * add benchmark * chores: interleaving with default value * main constraint sumcheck prove/verify pass * chores: mock witness * main constraint sumcheck verify final claim assertion pass * restructure ceno_zkvm package * refine expression format * wip lookup * lookup in logup implemetation with integration test pass * chores: code cosmetics * optimize with 2-stage sumcheck #103 * chores: refine virtual polys naming * fix proper ts and pc counting * try sumcheck bench * refine global state in riscv * degree > 1 main constraint sumcheck implementation #107 (#108) * monomial expression to virtual poly * degree > 1 sumcheck batched with main constraint * succint selector evaluation * refine succint selector evaluation formula and documentation * wip fix interleaving edge case * deal with interleaving_mles instance = 1 case * chores: code cosmetics and address review comments * fix logup padding with chip record challenge * riscv opcode type & combine add/sub opcode & dependency trim * ci whitelist ceno_zkvm lint/clippy * address review comments and naming cosmetics * remove unnessesary to_vec operation * deal with interleaving_mles instance = 1 case * support add/mul * adding test cases for UInt::add * refactor add and adding add_const test cases * adding UInt::mul test cases and refine UInt.expr() * refine test cases * minor refinement * tower verifier logup p(x) constant check * cleanup and hide thread-based logic * support sub logic in addsub gadget * add range checks for witIns and address some review feedback * soundness fix: derive new sumcheck batched challenge for each round * fix sel evaluation point and add TODO check * fix sumcheck batched challenge deriving order * add overflow constraint and support expr -> witIn under mul operation * chore: rename pc step size & fine tune project structure * assert decomposed constant equals original value * remove IS_OVERFLOW flag * test: fix wit_in of the operation result in testing * add is_None check in create_carry_witin * add _unsafe version and some cleanup * remove computed_outcome as review feedback * remove zombie witnesses * generalize 0xFFFF * refactor range check function to assert_ux * fixing review feedback * fixing lint * move uint to upper layer to fix lint error * fix for review feedback, rename create_witin and refine comment * remove unnecessary range check --------- Co-authored-by: sm.wu <[email protected]>
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To address #107