Vitis In-Depth Tutorials

Run Time for AIE and FPGA based platforms

Vitis_Accel_Examples

Notes on the Red Pitaya Open Source Instrument

A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.

100 Gbps TCP/IP stack for Vitis shells

VNx: Vitis Network Examples

Vitis Model Composer Examples and Tutorials

Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware

FPGA acceleration of arbitrary precision floating point computations.

High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.

Construct and Analyze the North American Vitis pangenome

An end-to-end GCN inference accelerator written in HLS

This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals

A Scalable BFS Accelerator on FPGA-HBM Platform

Includes the SVD-based approximation algorithms for compressing deep learning models and the FPGA accelerators exploiting such approximation mechanism, as described in the paper Mapping multiple LSTM models on FPGAs.

A Scalable BFS Accelerator on FPGA-HBM Platform

Github Repo for Embedded FPGA course by Vincent Claes

Notes on the Eclypse Z7 development board

The code repository of DGCNN on FPGA: Acceleration of The Point Cloud Classifier Using FPGAs