Skip to content

Fix vias not associating with PCB traces for DRC errors, add createSrjFromNodeWithPortPoints to make it easier to run DRC tests against subsolvers #146

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Jun 15, 2025

Conversation

seveibar
Copy link
Contributor

No description provided.

Copy link

vercel bot commented Jun 15, 2025

The latest updates on your projects. Learn more about Vercel for Git ↗︎

Name Status Preview Comments Updated (UTC)
capacity-node-autorouter ✅ Ready (Inspect) Visit Preview 💬 Add feedback Jun 15, 2025 5:56pm

@seveibar seveibar merged commit 41d34fe into main Jun 15, 2025
7 of 9 checks passed
@seveibar seveibar deleted the fix-single-transition branch June 15, 2025 17:57
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

1 participant