IP for image spatial filtering on Xilinx Zynq. For details watch
Introduction: https://youtu.be/Zm3KzhahbUg
Design of line buffer: https://youtu.be/n35zS__YEFQ
Design of MAC: https://youtu.be/6El_NQrpgCY
Design of control logic: https://youtu.be/v8pHH-q-0sE
IP packaging https://youtu.be/v8xZ7ZlJ3ek
Simulation https://youtu.be/tO5pZ2K9U9I
System Design https://youtu.be/r45dkUHIbk4
Software Design https://youtu.be/IO0hTR3ymdA
Edge Detection https://youtu.be/TcjqZG2pbHw