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[riscv64] Add support for qemu-ramfb and enable framebuffer #231

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@aenrbes aenrbes commented Nov 18, 2024

Hi @vvaltchev

According to the suggestion you mentioned in #230, I ported the driver of qemu-ramfb to tilck kernel and enabled the framebuffer mode by default.

@aenrbes aenrbes force-pushed the qemu_ramfb branch 2 times, most recently from 22fcd46 to a0b7285 Compare November 18, 2024 05:57
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aenrbes commented Nov 18, 2024

Hi @vvaltchev

My preliminary description of the hardware support for riscv is as follows:

riscv64 support

Tilck's riscv64 architecture mainly focuses on embedded applications. Tilck runs in RV64 supervisor mode (Smode), uses
SV39 three-level page table virtual memory (the code architecture can theoretically support any multilevel page table),
and supports user space floating point.

hardware peripheral support

riscv64 architecture adopts a device tree-based driver model, and all hardware information will be obtained from the
device tree transmitted by the bootloader. Therefore, tilck riscv kernel code does not have any board-level description
code. The system tick clock invokes the SBI monitor program (openSBI) through riscv SBI interface Instead of
implementing a driver in tilck; The system RTC clock implemented a very simple goldfish virtual RTC driver, of course,
goldfish rtc can only be used on the qemu virtual platform; Tilck riscv does not implement PC peripherals such as
keyboards, the input and output all rely on serial ports (which is enough for most embedded applications), the most
common ns16550 driver is implemented; To better manage the multi-level nested interrupt architecture common in
embedded chips, tilck's riscv implements a simplified framework similar to the idea of Linux irq domain, the most
common intc and plic interrupt controller drivers in riscv are realized.

kernel's cmdline

The modification of kernel's cmdline for riscv64 is a little more complicated than that for i386, requiring the
modification of the bootargs parameter in uEnv.txt(located in the other/bsp/corresponding board subfolder).

board support

riscv64 architecture implements a very simple bsp framework, which only needs to set the environment variable
BOARD to build a image of the corresponding board. Currently only support sipeed licheerv-nano board (https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html) and qemu-virt virtual board (the default).
qemu-virt has the framebuffer mode enabled by default, while licheerv-nano needs to patch original bootloader
provided by sipeed to use the framebuffer.

The use of qemu-virt board is very simple, just export ARCH=riscv64, and follow instructions of i386's.

Using the licheerv-nano is a little more cumbersome:

  1. Make image
export ARCH=riscv64
export BOARD=licheerv-nano
./scripts/build_toolchain
make
  1. Flash the image file build/tilck.img into a microSD card;
  2. Insert the microsd card into the card slot on the licheerv-nano board;
  3. Connect uart0 on the board (baudrate 115200), and power on the board.
  4. Have fun!

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