Add display configuration for M5Stack CoreS3 and CoreS3-SE #99186
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The M5Stack CoreS3 and CoreS3-SE are equipped with an ILI9342C SPI LCD controller. This commit adds the corresponding DTS nodes for it. Since the display backlight is powered by the AXP2101 regulator, the regulator driver is enabled by default, and the initialization priorities of the mipi_dbi and display drivers have been adjusted accordingly. Note: On the CoreS3-SE, the TF card slot and the ILI9342C display share the same SPI bus, and the display repurposes the MISO pin as the LCD_DC signal. In this case, the `mipi_dbi` DTS node is disabled by default. To enable it, overlay the configuration to remove `SPIM2_MISO_GPIO35` from the pinctrl. Signed-off-by: Chen Xingyu <[email protected]>
Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack CoreS3-SE. The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin can be used as the LCD_DC signal. Signed-off-by: Chen Xingyu <[email protected]>
Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack CoreS3-SE. The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin can be used as the LCD_DC signal. Signed-off-by: Chen Xingyu <[email protected]>
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Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack CoreS3-SE. The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin can be used as the LCD_DC signal. Signed-off-by: Chen Xingyu <[email protected]>
Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack CoreS3-SE. The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin can be used as the LCD_DC signal. Signed-off-by: Chen Xingyu <[email protected]>
Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack CoreS3-SE. The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin can be used as the LCD_DC signal. Signed-off-by: Chen Xingyu <[email protected]>
…3-SE Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack CoreS3-SE. The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin can be used as the LCD_DC signal. Signed-off-by: Chen Xingyu <[email protected]>
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The M5Stack CoreS3 and CoreS3-SE are equipped with an ILI9342C SPI LCD controller. This PR adds the corresponding DTS nodes for it.
Since the display backlight is powered by the AXP2101 regulator, the regulator driver is enabled by default, and the initialization priorities of the mipi_dbi and display drivers have been adjusted accordingly.
Note: On the CoreS3-SE, the TF card slot and the ILI9342C display share the same SPI bus, and the display repurposes the MISO pin as the LCD_DC signal. In this case, the
mipi_dbiDTS node is disabled by default. To enable it, applications should overlay the configuration to remove SPIM2_MISO_GPIO35 from the pinctrl. Such overlays are also added to several samples in this PR.