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@biwenli biwenli commented Nov 11, 2025

Change irqsteer driver as a zephyr native driver

Introduce new properties:
irq_offset, irqs_num.

Signed-off-by: Biwen Li <[email protected]>
This commit changes this driver as a
native driver.
- Support multiple irqsteer instances.
- Indroduce new properties(irq_offset, irqs_num).

Signed-off-by: Biwen Li <[email protected]>
Add irqsteer node to support
multi level interrupts

Signed-off-by: Biwen Li <[email protected]>
Drop hal nxp  irqsteer drivers.

Signed-off-by: Biwen Li <[email protected]>
This commit enables multi level interrupts:
- Enable multi level interrupts
  imx943 is a two level interrupts system and
  some interrupts(eg. edma interrupts) depend on irqsteer.
- Increase irq number from 405 to 790
  Actually there are 407(IRQ 0 ~ IRQ 406) interrupts
  from nvic(first level interrupts),
  The second level interrupts are extended by irqsteer,
  it extends 32 x 12 = 384 interrupts,
  So first level interrupts + second level interrupts
  = 407 + 384 = 791(IRQ 0 ~ IRQ 790) interrupts

Signed-off-by: Biwen Li <[email protected]>
Enable edma4 by default for m33(in NETCMIX) of imx943_evk

Signed-off-by: Biwen Li <[email protected]>
This adds priority attribute to irqsteer in order to
support multi level interrupts.

We need to make this change atomic so that we don't break
the build.

So, we introduce a new property named 'priority' to
`interrupt-cells` and we increase the number of cells.
Then we update all instances of interrupts
using irqsteer (for imx95, imx8m, imx8qm, imx8qxp and also
update the overlay(imx8mp_evk_mimx8ml8_adsp) for tests.

Signed-off-by: Biwen Li <[email protected]>
Add config for imx943_evk_mimx94398_m33
- Use the sample to test the irqsteer driver

Signed-off-by: Biwen Li <[email protected]>
This commit fixes build issue when multi level interrupts is enabled,
define TEST_IRQ_NUM as (CONFIG_2ND_LVL_ISR_TBL_OFFSET - 1)
  - CMSIS/Core/Include/core_cm33.h:2438:15: error: array subscript 24
    is above array bounds of volatile uint32_t[16]

Signed-off-by: Biwen Li <[email protected]>
This commit fixes build issue when multi level interrupts feature
is enabled, define new macro TEST_1ST_LEVEL_INTERRUPTS_MAX to
support multi level interrupts case.
  - error: array subscript 24 is above array bounds of 'volatile
    uint32_t[16]' {aka 'volatile unsigned int[16]'}
    [-Werror=array-bounds])

Signed-off-by: Biwen Li <[email protected]>
Fix build issue when multi level interrupts is enabled,
define new macro TEST_1ST_LEVEL_INTERRUPTS_MAX to support multi
level interrupts case.
  - core_cm33.h:2559:47: error: iteration 496 invokes undefined behavior
    [-Werror=aggressive-loop-optimizations]

Signed-off-by: Biwen Li <[email protected]>
Exclude imx943,
  - multi level interrupts feature is enabled defaultly,
    so irqsteer1 driver is enabled, then the test case
    report the build issue:
    multiple definition of z_soc_irq_enable,
    tests/arch/arm/arm_custom_interrupt/src/arm_custom_interrupt.c:47
    first defined here.

Signed-off-by: Biwen Li <[email protected]>
Add irqsteer node for m7_0.

Signed-off-by: Biwen Li <[email protected]>
Add irqsteer node for m7_1.

Signed-off-by: Biwen Li <[email protected]>
Add edma2 node for lpuart3.

Signed-off-by: Biwen Li <[email protected]>
Enable edma2 defaultly.

Signed-off-by: Biwen Li <[email protected]>
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Some initial comments below.

Most importantly: please don't change anything in the driver unless it's related to the fact that you're dropping the HAL API. This is an important change and by doing so you're making the review harder and easier to miss out the important stuff.

If you really want to make some unrelated changes then please do so in a separate commit with the appropriate justification.

Also, please make sure you don't break bisectability (see comment from binding). Make sure that after you apply each commit, the affected boards will still compile.

So for irqsteer instance 0, irq offset is 300.
For irqsteer instance 1, irq offset is 501.
irqs_num:
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I'd suggest changing to "nxp,num-irqs" to align with Linux's "fsl,num-irqs"

For irqsteer instance 1, irq offset is 501.
irqs_num:
required: true
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you're going to have to add this property to all devicetrees who have IRQSTEER nodes in this same commit. Otherwise, you'll be breaking bisectability.

#include "sw_isr_common.h"

LOG_MODULE_REGISTER(nxp_irqstr);
LOG_MODULE_REGISTER(nxp_irqsteer, LOG_LEVEL_WRN);
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this change seems unrelated to the fact that you're dropping the NXP HAL API? please drop from this commit. If needed, address as separate commit.

.master_index = DT_REG_ADDR(node_id), \
.irq = DT_IRQN(node_id), \
/* IRQ_STEER register offsets */
#define CTRL_STRIDE_OFF(_t, _r) (_t * 4 * _r)
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please use tab to align with the other macro values

#if defined(CONFIG_XTENSA)
#define irqstr_l1_irq_enable_raw(irq) xtensa_irq_enable(XTENSA_IRQ_NUMBER(irq))
#define irqstr_l1_irq_disable_raw(irq) xtensa_irq_disable(XTENSA_IRQ_NUMBER(irq))
#define irqstr_l1_irq_enable_raw(irq) xtensa_irq_enable(XTENSA_IRQ_NUMBER(irq))
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same comment as the LOG_MODULE_REGISTER stuff above

/**
* @brief Enable specific interrupt in IRQ_STEER
*/
static void irqsteer_enable_interrupt(const struct irqsteer_config *cfg, uint32_t irq)
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suggestion: combine irqsteer_enable_interrupt and irqsteer_disable_interrupt into a single function: irqsteer_enable_disable_interrupt (or something like that) that takes a bool as the third parameter: enabled.

/**
* @brief Enable master interrupt output
*/
static void irqsteer_enable_master_interrupt(const struct irqsteer_config *cfg, int master_index)
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same as irqsteer_enable_interrupt()

reg_index--;
continue;
}
uint32_t ch_status = IRQSTEER_READ32(base, CHAN_STATUS(reg_index, reg_num));
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pls keep variable declarations at the beginning of the function

if (disp) {
IRQSTEER_EnableMasterInterrupt(UINT_TO_IRQSTEER(DISPATCHER_REGMAP(disp)),
irq);
cfg = disp->dev->config;
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can do this assignment at the beginning of the function once?-

reg:
required: true

irq_offset:
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do we still need this?

CC: @yongxu-wang15

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3 participants