Optimize cache kernels with loop unrolling on flash variant #1876
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Optimize cache kernels with loop unrolling on flash variant, achieves up to 4.57% speedup on concat_cache_mla op
Motivation
Through profiling and optimization analysis, we identified that the
reshape_and_cache_flash_kernelvariant responds well to instruction-level parallelism improvements. This PR applies a targeted pragma-based optimization to achieve measurable performance gains with minimal code changes.Technical Details
Add
#pragma unroll 4directive toreshape_and_cache_flash_kernelOptimization Analysis:
Test Plan
Comprehensive Benchmarking:
Correctness Validation:
test_kvcache.py,test_kvcache_blockscale.py,test_indexer_k_quant_and_cache.py,test_concat_cache_mla.pyPlatform: AMD Instinct MI300X (gfx942), ROCm 7.0.0
Test Result
Overall Performance: 1.0190x speedup (+1.90% improvement)
Per-Kernel Breakdown:
Configuration Results:
Scaling Characteristics: