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[SYCL][E2E] Disable fill_any_size.cpp on FPGA #13040

[SYCL][E2E] Disable fill_any_size.cpp on FPGA

[SYCL][E2E] Disable fill_any_size.cpp on FPGA #13040

Triggered via pull request January 10, 2025 16:09
@sarnexsarnex
synchronize #16590
sarnex:fill
Status Failure
Total duration 1h 6m 15s
Artifacts 2

sycl-linux-precommit.yml

on: pull_request
detect_changes  /  Decide which tests could be affected by the changes
7s
detect_changes / Decide which tests could be affected by the changes
build_e2e_tests  /  Build e2e tests
5m 26s
build_e2e_tests / Build e2e tests
Decide which Arc tests to run
0s
Decide which Arc tests to run
Matrix: test-perf
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Matrix: run_prebuilt_e2e_tests
Matrix: test
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Artifacts

Produced during runtime
Name Size Digest
sycl_e2e_bin_default Expired
253 MB
sha256:96158c87e9538c4c79ba16c9588625c3c0cf455afb7b9a522d29338f1f61fcaa
sycl_linux_default Expired
348 MB
sha256:aabc7443a9b91096f2b61d5aaeff0d8ac0941e10707f34b98633b8038374f98d