[SYCL-MLIR] Merge from intel/llvm sycl branch#8849

Merged

whitneywhtsang merged 3700 commits intointel:sycl-mlirfrom

whitneywhtsang:merge

Mar 29, 2023

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Commits on Mar 24, 2023

[lldb] Add header REPL.h to lldb_Expression
bulbazord
committed
[Pseudo Probe] Add the test for probe desc
wlei-llvm
committed
[libc] Use `nvptx_kernel` attribute in NVPTX startup code
jhuber6
committed
[mlir][tosa] Improve performance of tosa.transpose constant folding

sabauma
authored and
rsuderman
committed
[JITLink] Fix MSVC build error: formatv can't handle support::ulittle16_t values
weliveindetail
committed
[Support] Fix warnings
kazutakahirata
committed
[APFloat] Add E4M3B11FNUZ
majnemer
committed
Fix mlir/lib/Bindings/Python/IRTypes.cpp for Float8E4M3B11FNUZType
majnemer
committed
[libc][Obvious] Remove a compile opt to x86_64 longjmp in a previous commit.
Siva Chandra Reddy
committed
[lldb] Add ability to hide the root name of a value
kastiglione
committed
[mlir][sparse] Updating the `Merger::{exp,lat,set}` methods to return const
wrengr
committed
[mlir][sparse] Misc cleanup in Merger.h
wrengr
committed
[mlir][sparse] Updating TensorExp ctor to catch unknown TensorExp::Kind
wrengr
committed
[mlir][sparse] moving kInvalidId into "detail" namespace
wrengr
committed
[mlir][vector] Hoist redundant singleton vector transfer reads
harsh-nod
committed
[mlir][linalg] Convert input type to accumulator type in im2col patterns
qedawkins
committed
[lldb][NFC] Remove outdated TODOs from API headers
bulbazord
committed
[mlir][sparse] Factoring out LoopEmitter::isValidLevel
wrengr
committed
[Fuchsia] Add FUCHSIA_USE_MULTIPLE_DISTRIBUTIONS.
mysterymath
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[llvm-jitlink] Rename -show-graph option to -show-graphs, make it a regex.
lhames
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[llvm-jitlink] Remove unnecessary header include left in 01bdd8cffca.
lhames
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[RISCV][NFC] Renamed [Read/Write]VGather* -> [Read/Write]VRGatherV*
nitinjohnraj
committed
[RISCV][NFC] Broke ReadVRGatherVV into ReadVRGatherVV_data and ReadVRGatherVV_index to separate the reads for VRGatherVV
nitinjohnraj
committed
[RISCV][NFC] Added possible SEWs associated with a given LMUL
nitinjohnraj
committed
[RISCV][NFC] Remove SEW suffix from pseudoinstructions
nitinjohnraj
committed
[RISCV] Made vcompress pseudoinstruction SEW-aware
nitinjohnraj
committed
[RISCV] Made vrgather.vv and vrgatherei16 pseudoinstructions SEW-aware
nitinjohnraj
committed
[RISCV] Made division pseudoinstructions SEW-aware
nitinjohnraj
committed
[RISCV] Made fsqrtv pseudoinstruction SEW-aware
nitinjohnraj
committed

Commits on Mar 25, 2023

Commits on Mar 26, 2023

Commits on Mar 27, 2023

Commits on Mar 28, 2023