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MSI接口形式，建议从AXI4-LITE改成AXI4接口形式

Status: Open.

#16 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Dec 31, 2024

【IMSIC interrupt file 中的setipnum配置，支持写，但是读不支持，且读出来的数据应该是0】

Status: Open.

#10 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Nov 12, 2024

【目前IMSIC与CPU交互接口，建议寄存输出】

Status: Open.

#9 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Nov 11, 2024

【topei不应依赖于eidelivery】

Status: Open.

#8 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Nov 11, 2024

【vgein=0，并且处在VS模式下，CSR访问操作，也应该上报illegal】

Status: Open.

#7 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Nov 11, 2024

【interrupt file sel上的判断方式】

Status: Open.

#6 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Nov 11, 2024

【默认参数修改】

Status: Open.

#5 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Nov 11, 2024

【eips产生机制】

Status: Open.

#4 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Nov 11, 2024

【复位方式：建议异步复位】

Status: Open.

#3 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Nov 11, 2024

【时钟域及组件划分】

Status: Open.

#2 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Nov 11, 2024

【csr_wdata_vld 时序是怎样的？】

Status: Open.

#1 In OpenXiangShan/ChiselAIA;

· zhaohong1988 opened on Nov 11, 2024