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Add CoupledL2 with CHI interface #145

Merged
merged 159 commits into from
May 14, 2024
Merged

Add CoupledL2 with CHI interface #145

merged 159 commits into from
May 14, 2024

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linjuanZ
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@linjuanZ linjuanZ commented May 8, 2024 •
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This pull request introduces TL2CHICoupledL2, which adopts TileLink standard to connect L1 DCache/ICache/PTW, and CHI Issue B specification to connect downstream interconnect. The key features of TL2CHICoupledL2 are:

  • Fully coherent Request Node in a CHI interconnect.
  • Coherency granule of 64B cache line.
  • MESI cache coherence model, which is based on TileLink coherence policies.
  • Transition from TL-C transactions to CHI snoopable requests.
  • Transition from TL-UL transactions to CHI non-snoopable requests.
  • Support for ReadNoSnp, ReadNotSharedDirty, ReadUnique, MakeUnique.
  • Support for WriteNoSnp, WriteBackFull, Evict.
  • Support for all the snoops except for SnpDVMOp.
  • Request retry to manage protocol resources.
  • Message transfer across CHI interfaces based on Link Layer Credit.
  • Power aware signaling on the component interface.

The original CoupledL2 is now renamed to TL2TLCoupledL2. TL2TLCoupledL2 still works as default L2 Cache instance in XiangShan processor for now. However, you can switch to TL2CHICoupledL2 by setting EnableCHI Field to true in src/test/scala/chi/TestTop.scala.

linjuanZ and others added 30 commits February 22, 2024 19:44
@linjuanZ
backbone: set up parameter system to adapt to tl2chi CoupledL2
45e2dcd
@linjuanZ
backbone: both chi and tl CoupledL2 inherit from CoupledL2Base
1d52927
@linjuanZ
backbone: add framework for CHI links and messages
b42c41d
@linjuanZ
backbone: implement top logic for CHI-CoupledL2
9fa1f0b
@linjuanZ
backbone: set up basic CHI-CoupledL2 framework
a584a16
@linjuanZ
RequestBuffer: fix potential performance bugs
e9d7246
@linjuanZ
RXSNP: transform L-Credit handshake to DecoupledIO using queue
00d8e01
@linjuanZ
LinkLayer: add utility to transform DecoupledIO into ChannelIO
3a4b1c5
@linjuanZ
Bundle: add trait for extra fields that only CHI TaskBundle owns
29b59d4
@linjuanZ
Common: rewrite TaskBundle
79718a4
@linjuanZ
Bundle: update HasCHIChannelBits
ca8eadb
@linjuanZ
An initial version of MainPipe
8d843c7
@yulightenyu
initial version
270e92a
@yulightenyu
update
a909f7c
@yulightenyu
update MSHR and RXSNP
f3d4abd
@yulightenyu
add logic of MSHR and RX*
37b98e3
@yulightenyu
update ID transfer
7ddf596
@yulightenyu
clean some compile error
98143b5
@linjuanZ
Add TX* channels and their flow control logic
cdfb2c0
@linjuanZ
Slice: Use DecoupledIO instead of ChannelIO as CHI-side IO
efaacbc
@yulightenyu
fix compile
3904dba
@linjuanZ
Merge branch 'chi-coupledl2-tx' into chi-coupledl2
04c23b7
@linjuanZ
Message: complete and fix flit fields
ee2622d
@Tang-Haojin @linjuanZ
L2Param: fix inconsistency of chiselDB availability (#98)
6cdabb7
@cailuoshan @linjuanZ
Fix some bugs for CPL2 (#99)
9b15538 
* SinkC: fix bug for regs Buf not init

* MSHR: fix bug when L1_acquirePerm but L2_miss, L2 should acquireBlock to L3, not only acquirePerm

* MainPipe: when L3_probetoB and L2=TIP, L2 donot need probetoB L1

* SinkB: cannot accept Probe when same-addr Release to L3 and have not receive ReleaseAck

---------

Co-authored-by: Cai Luoshan <[email protected]>
@Ivyfeather @linjuanZ
New hint design (#101)
1869ced 
* ReqArb: only give s1 info when s1-to-s2 fire

* Backbone: new structure for Hint
now we send Hint @s1 for every MSHR-GrantData passing by
   and send Hint @s3 for every  CHN-GrantData passing by

* CoupledL2: update logic for Hint Arb

* misc: fix connection

* Hint: consider new feature ** AMergeTask **

* Hint: fix Hint Arb among Slices

* Hint: add keyword info
@linjuanZ
Add TestTop for CHI-CoupledL2
cd39ec3 
Enter command `make test-top-chil2` to generate CHI-CoupledL2 verilog
@linjuanZ
Message: add RSVDC field in REQ and DAT channel
9602328
@linjuanZ
LinkLayer: add flatten of flit and its reverse operation
8e36f07
@linjuanZ
LinkLayer: fix field arrangement in CHI flit
c7c1edf
@Kumonda221-CrO3 Kumonda221-CrO3 requested a review from Ivyfeather May 8, 2024 06:39
Ivyfeather

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@linjuanZ linjuanZ requested a review from Ivyfeather May 10, 2024 07:06
@linjuanZ linjuanZ merged commit 2a260b4 into master May 14, 2024
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@Ivyfeather Ivyfeather modified the milestone: TileLink2CHI CPL2 May 15, 2024
@Ivyfeather Ivyfeather added the milestone Important feature label May 15, 2024
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@Ivyfeather Ivyfeather Ivyfeather approved these changes

@Kumonda221-CrO3 Kumonda221-CrO3 Awaiting requested review from Kumonda221-CrO3 Kumonda221-CrO3 is a code owner

@wakafa1 wakafa1 Awaiting requested review from wakafa1

@cailuoshan cailuoshan Awaiting requested review from cailuoshan

@yulightenyu yulightenyu Awaiting requested review from yulightenyu

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@linjuanZ @Ivyfeather @yulightenyu @Tang-Haojin @cailuoshan @Kumonda221-CrO3 @cyril0124 @cyyself @Archer613