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Max delay timings for the following UltraScale+ resources, as described initially by Maidee et al. -- An Open-source Lightweight Timing Model for RapidWright and subsequently implemented in RapidWright:

  1. PIPs (referencing a delay in seconds at Device.pipTimings.internalDelay.slow.slow.max.max, capturing the "base" k0+k1*L(TG) component of paper's Equation 1)
  2. Nodes (referencing the additional delay in seconds made up of Device.nodeTimings.capacitance * Device.nodeTimings.resistance, capturing the "discontinuity" k2*d(TG) component of paper's Equation 1; see footnote A)
  3. SitePIP delays (SitePIP.delay.slow.slow.max.max in seconds)
  4. Cell delays (CellBelMapping.pinsDelay.cornerModel.slow.slow.max.max in seconds)

Footnote A -- due to there not being a delay field in NodeTiming, the discontinuity delay of specific nodes (i.e. those that cross BRAM/URAM/DSP/IO/etc. columns) is captured using the product of the NodeTiming.capacitance and NodeTiming.resistance fields (T=RC) for a value in second. In this implementation, C is fixed to 1e-12 meaning that R represents the delay in picoseconds.

Since bidirectional PIPs (e.g. INT_X0Y0/INT.INT_NODE_IMUX_5_INT_OUT0<<->>BYPASS_E8) can only reference one delay value, only the forward delay (INT_NODE_*->>BYPASS_E8) is captured.

@eddieh-xlnx eddieh-xlnx requested a review from clavin-xlnx June 12, 2024 11:52
Signed-off-by: Eddie Hung <[email protected]>
Signed-off-by: Eddie Hung <[email protected]>
Signed-off-by: Eddie Hung <[email protected]>
Signed-off-by: Eddie Hung <[email protected]>
Signed-off-by: Eddie Hung <[email protected]>
@eddieh-xlnx eddieh-xlnx force-pushed the fpgaif_device_timings branch from e785302 to 8222132 Compare June 13, 2024 09:58
private static DelayEstimatorBase delayEstimator;
private static DelayModel intrasiteAndLogicDelayModel;

private static final float PICSECONDS_TO_SECONDS = 1e-12f;
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PICOSECONDS

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3 participants