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@clavin-xlnx clavin-xlnx commented Jun 30, 2025

A tool designed to attached (and remove in a separate invocation) inline flip-flops to ports of an out-of-context DCP. This is to help routability for kernels once put in-context that will be replicated later.

Signed-off-by: Chris Lavin <[email protected]>
Signed-off-by: Chris Lavin <[email protected]>
Signed-off-by: Chris Lavin <[email protected]>
@clavin-xlnx clavin-xlnx requested a review from eddieh-xlnx July 2, 2025 22:32
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korbin commented Jul 4, 2025

This is very similar to what I am doing with the createGreybox function here, and if you squint, could be useful for #356.

I am using LUT1s for this purpose, though unclocked D-only or Q-only FDREs seemed to work as well, I wasn't sure which would be superior.

If using a D-only or Q-only FDRE doesn't cause Vivado to emit static GND/VCC LUTs and routes (I didn't check that closely), FDREs might be better than LUT1s.

Signed-off-by: Eddie Hung <[email protected]>
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If using a D-only or Q-only FDRE doesn't cause Vivado to emit static GND/VCC LUTs and routes (I didn't check that closely), FDREs might be better than LUT1s.

In theory, it should not, but may depend on the architecture. There are inverters built into control set signal site inputs so GND doesn't have to be sourced explicitly. We went with FDREs in this case over LUT1s as they can affect the timing of the port-connected paths and by moving the FDREs farther away from the out-of-context module, potentially, you could coax greater slack out of the connection.

Signed-off-by: Chris Lavin <[email protected]>
@clavin-xlnx clavin-xlnx merged commit 6b1b255 into 2025.1.1 Jul 16, 2025
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@clavin-xlnx clavin-xlnx deleted the inline_flop branch July 16, 2025 03:53
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4 participants