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Combine (shl (and x, imm1), imm2) to (shl x, imm2) #246
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It will be nice to have MIR tests applying the exact pattern in terms of G_MIR instructions. |
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Hi @abhinay-anubola, the implementation looks good! Do you have some impact measurement (QoR)? |
There are no significant changes, all changes are around than 0.1% |
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I would like to suggest updating the commit message to include the conditions that must be met in order to apply the combiner. It could be similar to what you mentioned in your initial comment. This will be helpful for future reference. The PR is in very good shape! |
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// Try to match shl (and x, imm1), imm2 | ||
int64_t ShiftImm, AndImm; | ||
if (!mi_match(DstReg, MRI, | ||
m_GShl(m_OneNonDBGUse(m_GAnd(m_Reg(Reg), m_ICst(AndImm))), |
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nit: I don't think the mOneNonDBGUse condition is tested, but I also don't think it's necessary. We just remove a use of the AND. If it's the last use, DCE will remove it; if it's not, it will serve the other uses.
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Would be nice if this could be upstreamed to get the AArch64 and AMDGPU updates in mainstream. That would require to isolate the AIE changes in a separate commit.
Generic combiner that combines
into
Where (~imm1 << imm2) = 0
Updated existing tests and added new tests accordingly.