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Pull requests: Xilinx/llvm-aie
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[AIEX] Fix RegionEndEdges DAG mutator to lower hwloop setup latency and padd the setup instruction instead
#860
opened Mar 20, 2026 by
khallouh
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[AIE2P] Implement lock no_fence scheduling semantics
#856
opened Mar 18, 2026 by
katerynamuts
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[AIE] Add TTI overrides to prevent sub-512-bit vector arithmetic
#839
opened Mar 11, 2026 by
FIM43-Redeye
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3 tasks done
[InstCombine][AIEX] Add load->trunc->inttoptr combine pattern
#837
opened Mar 10, 2026 by
andcarminati
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[AIEX][NFC] Fix 6 failing lit tests for macOS compatibility and updated codegen
#836
opened Mar 10, 2026 by
F-Stuckmann
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Draft
[MLIR][Quant] Add alias type printing for BlockFloat
upstream
PRs to upstream
#803
opened Feb 26, 2026 by
jorickert
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[AIEX][AIE2P] Several new combiners to simplify vector operations
#772
opened Feb 2, 2026 by
andcarminati
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[NFC] Serialize/Deserialize Register Allocations during Allocation
#750
opened Jan 6, 2026 by
F-Stuckmann
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[AIE] Fix dereferencing an unengaged std::optional<int>.
#744
opened Dec 19, 2025 by
SagarMaheshwari99
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[AIE2P] Add alternative calling convention for library calls
#664
opened Sep 24, 2025 by
konstantinschwarz
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[DRAFT][AIE2P] Add pseudo to handle VMAC_f_vmac_bf_vmul_bf_core_X_X
#649
opened Sep 11, 2025 by
andcarminati
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[AIE2P][Vectorization] Support for reduction in Peano
#604
opened Aug 7, 2025 by
Sameeranjoshi
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