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Use small lock to protect resources related to irq in arch ARM. #15625

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Jan 23, 2025
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44 changes: 28 additions & 16 deletions arch/arm/src/a1x/a1x_irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
#include <errno.h>
#include <debug.h>

#include <nuttx/irq.h>
#include <nuttx/spinlock.h>
#include <nuttx/arch.h>

#include "arm_internal.h"
Expand All @@ -40,6 +40,12 @@
#include "a1x_pio.h"
#include "a1x_irq.h"

/****************************************************************************
* Private Data
****************************************************************************/

static spinlock_t g_irq_lock = SP_UNLOCKED;

/****************************************************************************
* Private Functions
****************************************************************************/
Expand All @@ -53,14 +59,10 @@
****************************************************************************/

#if defined(CONFIG_DEBUG_IRQ_INFO)
static void a1x_dumpintc(const char *msg, int irq)
static void a1x_dumpintc_nolock(const char *msg, int irq)
{
irqstate_t flags;

/* Dump some relevant ARMv7 register contents */

flags = enter_critical_section();

irqinfo("ARMv7 (%s, irq=%d):\n", msg, irq);
irqinfo(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());

Expand Down Expand Up @@ -95,10 +97,20 @@ static void a1x_dumpintc(const char *msg, int irq)
getreg32(A1X_INTC_PRIO0), getreg32(A1X_INTC_PRIO1),
getreg32(A1X_INTC_PRIO2), getreg32(A1X_INTC_PRIO3),
getreg32(A1X_INTC_PRIO4));
}

static void a1x_dumpintc(const char *msg, int irq)
{
irqstate_t flags;

flags = spin_lock_irqsave(&g_irq_lock);

a1x_dumpintc_nolock(msg, irq);

leave_critical_section(flags);
spin_unlock_irqrestore(&g_irq_lock, flags);
}
#else
# define a1x_dumpintc_nolock(msg, irq)
# define a1x_dumpintc(msg, irq)
#endif

Expand Down Expand Up @@ -297,7 +309,7 @@ void up_disable_irq(int irq)
{
/* These operations must be atomic */

flags = enter_critical_section();
flags = spin_lock_irqsave(&g_irq_lock);

/* Make sure that the interrupt is disabled. */

Expand All @@ -313,8 +325,8 @@ void up_disable_irq(int irq)
regval |= INTC_MASK(irq);
putreg32(regval, regaddr);

a1x_dumpintc("disable", irq);
leave_critical_section(flags);
a1x_dumpintc_nolock("disable", irq);
spin_unlock_irqrestore(&g_irq_lock, flags);
}

#ifdef CONFIG_A1X_PIO_IRQ
Expand Down Expand Up @@ -345,7 +357,7 @@ void up_enable_irq(int irq)
{
/* These operations must be atomic */

flags = enter_critical_section();
flags = spin_lock_irqsave(&g_irq_lock);

/* Make sure that the interrupt is enabled. */

Expand All @@ -361,8 +373,8 @@ void up_enable_irq(int irq)
regval &= ~INTC_MASK(irq);
putreg32(regval, regaddr);

a1x_dumpintc("enable", irq);
leave_critical_section(flags);
a1x_dumpintc_nolock("enable", irq);
spin_unlock_irqrestore(&g_irq_lock, flags);
}

#ifdef CONFIG_A1X_PIO_IRQ
Expand Down Expand Up @@ -398,7 +410,7 @@ int up_prioritize_irq(int irq, int priority)
{
/* These operations must be atomic */

flags = enter_critical_section();
flags = spin_lock_irqsave(&g_irq_lock);

/* Set the new priority */

Expand All @@ -408,8 +420,8 @@ int up_prioritize_irq(int irq, int priority)
regval |= INTC_PRIO(irq, priority);
putreg32(regval, regaddr);

a1x_dumpintc("prioritize", irq);
leave_critical_section(flags);
a1x_dumpintc_nolock("prioritize", irq);
spin_unlock_irqrestore(&g_irq_lock, flags);
return OK;
}

Expand Down
2 changes: 2 additions & 0 deletions arch/arm/src/am335x/am335x_irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -41,8 +41,10 @@
* Private Data
****************************************************************************/
#ifdef CONFIG_ARCH_IRQPRIO
#if defined(CONFIG_DEBUG_IRQ_INFO)
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merge with previous line

static spinlock_t g_irq_lock = SP_UNLOCKED;
#endif
#endif

/****************************************************************************
* Public Data
Expand Down
14 changes: 11 additions & 3 deletions arch/arm/src/at32/at32_irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
#include <assert.h>
#include <debug.h>

#include <nuttx/irq.h>
#include <nuttx/spinlock.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include <arch/armv7-m/nvicpri.h>
Expand Down Expand Up @@ -62,6 +62,14 @@
#define NVIC_ENA_OFFSET (0)
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)

/****************************************************************************
* Private Data
****************************************************************************/

#if defined(CONFIG_DEBUG_IRQ_INFO)
static spinlock_t g_irq_lock = SP_UNLOCKED;
#endif

/****************************************************************************
* Private Functions
****************************************************************************/
Expand All @@ -79,7 +87,7 @@ static void at32_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;

flags = enter_critical_section();
flags = spin_lock_irqsave(&g_irq_lock);

irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
Expand Down Expand Up @@ -123,7 +131,7 @@ static void at32_dumpnvic(const char *msg, int irq)
irqinfo(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));

leave_critical_section(flags);
spin_unlock_irqrestore(&g_irq_lock, flags);
}
#else
# define at32_dumpnvic(msg, irq)
Expand Down
24 changes: 15 additions & 9 deletions arch/arm/src/efm32/efm32_gpioirq.c
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
#include <assert.h>

#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <nuttx/spinlock.h>

#include "arm_internal.h"
#include "hardware/efm32_gpio.h"
Expand All @@ -44,6 +44,12 @@
* Pre-processor Definitions
****************************************************************************/

/****************************************************************************
* Private Data
****************************************************************************/

static spinlock_t g_gpioirq_lock = SP_UNLOCKED;

/****************************************************************************
* Private Functions
****************************************************************************/
Expand Down Expand Up @@ -198,7 +204,7 @@ void efm32_gpioirq(gpio_pinset_t pinset)

/* Make sure that the pin interrupt is disabled */

flags = enter_critical_section();
flags = spin_lock_irqsave(&g_gpioirq_lock);
regval = getreg32(EFM32_GPIO_IEN);
regval &= ~bit;
putreg32(regval, EFM32_GPIO_IEN);
Expand Down Expand Up @@ -248,7 +254,7 @@ void efm32_gpioirq(gpio_pinset_t pinset)
}

putreg32(regval, EFM32_GPIO_EXTIFALL);
leave_critical_section(flags);
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
}

/****************************************************************************
Expand All @@ -270,11 +276,11 @@ void efm32_gpioirqenable(int irq)
uint32_t regval;
uint32_t bit;
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
flags = enter_critical_section();
flags = spin_lock_irqsave(&g_gpioirq_lock);
regval = getreg32(EFM32_GPIO_IEN);
regval |= bit;
putreg32(regval, EFM32_GPIO_IEN);
leave_critical_section(flags);
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
#else
bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 1);
#endif
Expand All @@ -301,11 +307,11 @@ void efm32_gpioirqdisable(int irq)
uint32_t bit;

bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
flags = enter_critical_section();
flags = spin_lock_irqsave(&g_gpioirq_lock);
regval = getreg32(EFM32_GPIO_IEN);
regval &= ~bit;
putreg32(regval, EFM32_GPIO_IEN);
leave_critical_section(flags);
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
#else
bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 0);
#endif
Expand All @@ -332,11 +338,11 @@ void efm32_gpioirqclear(int irq)
uint32_t bit;

bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
flags = enter_critical_section();
flags = spin_lock_irqsave(&g_gpioirq_lock);
regval = getreg32(EFM32_GPIO_IFC);
regval |= bit;
putreg32(regval, EFM32_GPIO_IFC);
leave_critical_section(flags);
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
#else
bitband_set_peripheral(EFM32_GPIO_IFC, (irq - EFM32_IRQ_EXTI0), 1);
#endif
Expand Down
14 changes: 11 additions & 3 deletions arch/arm/src/efm32/efm32_irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
#include <errno.h>
#include <debug.h>

#include <nuttx/irq.h>
#include <nuttx/spinlock.h>
#include <nuttx/arch.h>
#include <arch/armv7-m/nvicpri.h>

Expand Down Expand Up @@ -61,6 +61,14 @@
#define NVIC_ENA_OFFSET (0)
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)

/****************************************************************************
* Private Data
****************************************************************************/

#if defined(CONFIG_DEBUG_IRQ_INFO)
static spinlock_t g_irq_lock = SP_UNLOCKED;
#endif

/****************************************************************************
* Private Function
****************************************************************************/
Expand All @@ -78,7 +86,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;

flags = enter_critical_section();
flags = spin_lock_irqsave(&g_irq_lock);

irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
Expand Down Expand Up @@ -126,7 +134,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
#endif
#endif

leave_critical_section(flags);
spin_unlock_irqrestore(&g_irq_lock, flags);
}
#else
# define efm32_dumpnvic(msg, irq)
Expand Down
14 changes: 11 additions & 3 deletions arch/arm/src/eoss3/eoss3_irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
#include <errno.h>
#include <debug.h>

#include <nuttx/irq.h>
#include <nuttx/spinlock.h>
#include <nuttx/arch.h>
#include <arch/armv7-m/nvicpri.h>

Expand Down Expand Up @@ -60,6 +60,14 @@
#define NVIC_ENA_OFFSET (0)
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)

/****************************************************************************
* Private Data
****************************************************************************/

#if defined(CONFIG_DEBUG_IRQ_INFO)
static spinlock_t g_irq_lock = SP_UNLOCKED;
#endif

/****************************************************************************
* Private Functions
****************************************************************************/
Expand All @@ -77,7 +85,7 @@ static void eoss3_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;

flags = enter_critical_section();
flags = spin_lock_irqsave(&g_irq_lock);

irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
Expand Down Expand Up @@ -107,7 +115,7 @@ static void eoss3_dumpnvic(const char *msg, int irq)
getreg32(NVIC_IRQ24_27_PRIORITY),
getreg32(NVIC_IRQ28_31_PRIORITY));

leave_critical_section(flags);
spin_unlock_irqrestore(&g_irq_lock, flags);
}
#else
# define eoss3_dumpnvic(msg, irq)
Expand Down
14 changes: 11 additions & 3 deletions arch/arm/src/gd32f4/gd32f4xx_irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
#include <assert.h>
#include <debug.h>

#include <nuttx/irq.h>
#include <nuttx/spinlock.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include <arch/armv7-m/nvicpri.h>
Expand Down Expand Up @@ -62,6 +62,14 @@
#define NVIC_ENA_OFFSET (0)
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)

/****************************************************************************
* Private Data
****************************************************************************/

#if defined(CONFIG_DEBUG_IRQ_INFO)
static spinlock_t g_irq_lock = SP_UNLOCKED;
#endif

/****************************************************************************
* Private Functions
****************************************************************************/
Expand All @@ -79,7 +87,7 @@ static void gd32_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;

flags = enter_critical_section();
flags = spin_lock_irqsave(&g_irq_lock);

irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
Expand Down Expand Up @@ -133,7 +141,7 @@ static void gd32_dumpnvic(const char *msg, int irq)
getreg32(NVIC_IRQ92_95_PRIORITY));
#endif

leave_critical_section(flags);
spin_unlock_irqrestore(&g_irq_lock, flags);
}
#else
# define gd32_dumpnvic(msg, irq)
Expand Down
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