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Merge pull request #820 from diffblue/verilog-tc-unary
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Verilog: typechecking for remaining unary expressions
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tautschnig authored Nov 16, 2024
2 parents 87310da + 27474b3 commit 8444385
Showing 1 changed file with 25 additions and 4 deletions.
29 changes: 25 additions & 4 deletions src/verilog/verilog_typecheck_expr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2606,16 +2606,37 @@ exprt verilog_typecheck_exprt::convert_unary_expr(unary_exprt expr)
expr.type() = expr.op().operands()[0].type();
return std::move(expr);
}
else
else if(expr.id() == ID_bitnot)
{
convert_expr(expr.op());
expr.type() = expr.op().type();

// check boolean operators

if(expr.type().id()==ID_bool && expr.id()==ID_bitnot)
// Boolean?
if(expr.type().id() == ID_bool)
expr.id(ID_not);
}
else if(expr.id() == ID_posedge || expr.id() == ID_negedge)
{
convert_expr(expr.op());
expr.type() = bool_typet{};
}
else if(expr.id() == ID_verilog_smv_eventually)
{
convert_expr(expr.op());
make_boolean(expr.op());
expr.type() = bool_typet{};
}
else if(
expr.id() == ID_postincrement || expr.id() == ID_preincrement ||
expr.id() == ID_postdecrement || expr.id() == ID_predecrement)
{
convert_expr(expr.op());
expr.type() = expr.op().type();
}
else
{
throw errort() << "no conversion for unary expression " << expr.id();
}

return std::move(expr);
}
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