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@mcfi mcfi commented Jan 30, 2026

Summary: On Arm64, we may need up to 4 movz/movk instructions to load a 64-bit immediate to a GP register, which may contribute to some non-trivial portion in code size. To reduce the code size, this diff puts an immediate in literal pool and emits a single ldr instruction to load from memory.

Differential Revision: D91732849

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meta-codesync bot commented Jan 30, 2026

@mcfi has exported this pull request. If you are a Meta employee, you can view the originating Diff in D91732849.

@meta-cla meta-cla bot added the CLA Signed label Jan 30, 2026
mcfi added a commit to mcfi/hhvm that referenced this pull request Jan 30, 2026
…ovk instructions (facebook#9712)

Summary:

On Arm64, we may need up to 4 movz/movk instructions to load a 64-bit immediate to a GP register, which may contribute to some non-trivial portion in code size. To reduce the code size, this diff puts an immediate in literal pool and emits a single ldr instruction to load from memory.

Differential Revision: D91732849
@mcfi mcfi force-pushed the export-D91732849 branch from 4943a29 to bac905a Compare January 30, 2026 18:20
…ovk instructions (facebook#9712)

Summary:

On Arm64, we may need up to 4 movz/movk instructions to load a 64-bit immediate to a GP register, which may contribute to some non-trivial portion in code size. To reduce the code size, this diff puts an immediate in literal pool and emits a single ldr instruction to load from memory.

Differential Revision: D91732849
@mcfi mcfi force-pushed the export-D91732849 branch from bac905a to c194559 Compare January 30, 2026 21:19
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